Open Source Verilog

Open Source Verilog
by Paul McLellan on 08-03-2014 at 8:01 am

 Over the years there have been various open source EDA projects but none that has realized a full industrial strength design tool that has broad adoption and is strong enough to compete with similar products from the EDA industry.

Open source is clearly a great way to develop software. Lots of people can see all the source code and there is a sort of wisdom of crowds effect. As Eric Raymond famously said, “with enough eyeballs all bugs are shallow.” But there are two weak aspects to open source. Firstly, although it is a great development model it is not a great business model. It is hard to make money selling something that is also available for free. For sure, big companies will pay you something in support fees to make a problem go away and perhaps there are other for-fee services that can be built on top of the product. But there is a limit to how much can be charged. If a big EDA company open sourced all its software, nobody is going to make $50M deals since it is cheaper to set up a team of engineers for a couple of million and pull down the source and support yourself. The second problem is that open source works best when the programmers understand the problem they are solving, which usually means that the product being developed is one programmers will use themselves. Linux, gcc, Firefox, Apache (the web-server not the subsidiary of Ansys), mySQL and so on are the most successful open source projects, written by software engineers for software engineers. When a marketing person specifies the product details and then an engineering team implements them then this model doesn’t work so well. If remember reading a quote (but I can’t find it today) that “if you need a specification the project is already in trouble.”

 Tachyon Design Automation has been in existence for years and sells a Verilog simulator called CVC (for compiled Verilog code, since it compiles Verilog straight into x86 code with lots of detailed optimization). It supports full IEEE 1364 (2005) Verilog. Although any simulator’s speed depends somewhat on exactly what is being simulated, it is often the fastest simulator on the market for a given workload. One customer found that they couldn’t get their nightly regressions to run in one night with one of the big 3 EDA companies Verilog simulators but it would with CVC. This is not a cheap but adequate simulator, it is fully competitive.

CVC was developed by Steve Meyer whose roots go back to Gateway (where Verilog was developed and where the roots of Cadence’s simulation technology originate), Chronologic (where Synopsys’s VCS was originally developed). Antrim integrated the technology in their AMS simulator, which is a very demanding environment.

Tachyon’s customer base is mostly small companies who are not big enough to get the attention of the big 3 EDA companies’ salesforces but they also have some larger companies that use it to give additional capacity and keep a check on their primary simulator. However, selling against the big EDA companies is difficult. The big accounts get their simulators as part of a much larger deal, and the small companies don’t consume enough licenses.

So Tachyon have decided to do something different. They are making the entire simulator open source. You can download it from their website. Big semiconductor companies are suddenly interested since they want access to the source. Not so that they can fix their own bugs, they will pay Tachyon to do that, but so that they can integrate their own technology in with the simulator to improve their own verification effectiveness.

Tachyon Design Automation’s website is here.


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