
Dr. Il Park is the Founder and CEO of Primemas Inc. Prior to founding Primemas, he was Vice President at SK hynix where he led memory solutions, design innovation, and CAE. Prior to that he was the head of the SOC architecture development and engineering team at Samsung Electronics. Earlier in his career, Il was at IBM T.J. Watson Research where he was the Lead Architect for Server CPUs.
Park received his Ph.D. in Computer Engineering from Purdue University.
Tell us about your company
Primemas is a fabless semiconductor innovator founded in January 2023, with immediate offerings addressing DDR memory impediments in the modern data center. We’re headquartered in the heart of Silicon Valley, with an R&D center near Pangyo Techno Valley in South Korea, giving us access to excellent silicon design talent on both sides of the Pacific.
As a modular silicon company, we offer both pre-defined and quick-turn custom silicon solutions. Our proprietary Hublet® (Hub Chiplet) architecture enables us to tailor configurations to a customer’s specific requirements while keeping development cycles short and solutions cost-effective, eliminating the long lead times typically associated with custom silicon.
What problems are you solving?
Our initial products target an explosive trifecta of data center limitations centered on DRAM: cost, capacity, and performance. These constraints are amplifying fast as DRAM-constrained workloads grow more prevalent and varied across hyperscale and enterprise environments alike. The memory footprint of the average workload increasingly exceeds the dedicated memory capacity available on the host, forcing customers into difficult tradeoffs.
Historically, the only fix has been over-provisioning servers just to gain memory, driving up cost and energy use without adding compute value. Primemas has broken through the data center DRAM memory wall. Customers can now expand memory capacity independent of compute, without the performance penalty typical of memory expansion architectures. The result is direct improvement across the three metrics that matter most: performance, TCO, and energy consumption.
What application areas are your strongest?
We’ve built a full implementation of the most modern PCIe-CXL specifications, turning pooled, shared, hardware-based coherent memory from a theoretical spec into a working reality. Much of the market still views CXL as inefficient or immature, assuming added latency and that it is unproven at scale. That perception is outdated: our implementation debunks it directly, delivering massive performance gains and meaningful TCO reduction rather than the overhead early CXL skeptics expected.
That strength spans form factors and scales, from add-in cards to 1U systems, and JBOM configurations, in switchless and switch architectures respectively. Whether customers need gigabytes or petabytes of pooled memory, the same coherent, hardware-based foundation carries through without re-architecting the solution.
In short, our strongest application area isn’t tied to one workload or one form factor. We’re giving customers a proven, efficient path to disaggregated memory at whatever scale their infrastructure demands.
How does pooled/shared/disaggregated memory help a datacenter?
We transform dedicated DRAM memory in the data center into an independent, expandable, sharable, and upgradeable infrastructure layer.
What keeps your customers up at night?
Memory pricing and lead times are a constant pressure point. DRAM costs and availability shift quickly, and customers architected around a fixed memory-per-server ratio have little flexibility to absorb that volatility. This flows straight through to data center efficiency and TCO.
Beyond immediate cost pressure, customers need future-proofing. Workloads keep growing more varied and model sizes keep climbing, so today’s architecture decisions must accommodate dynamic memory demands that don’t exist yet. As an added benefit, disaggregation makes that memory investment fully portable. Nobody wants an infrastructure design that’s obsolete in twelve months.
Ultimately, data center operators are losing sleep over maximization of infrastructure efficiency. They need to maximize the service throughput and workload density of their existing and future GPU and CPU clusters. Our solutions allow them to execute significantly more AI and data services within the same hardware footprint, driving down operational expenditures while providing the agility to handle next-generation AI workloads that haven’t even been designed yet.
What does the competitive landscape look like and how do you differentiate?
The CXL memory expansion space is growing, and much of the competitive landscape is built around switched-fabric architectures. Primemas differentiates with our Hublet® architecture, delivering unparalleled low-latency, switchless capacity that supports 14, 16, 32 DIMMs and beyond. All without the added latency, cost, and power overhead a switching layer introduces. For customers scaling further, our JBOM solutions extend that same coherent, hardware-based approach into the petabyte range.
We’re also ahead on real-world validation: engineering sample silicon has been in the field gathering real workload and customer feedback for over a year. This isn’t a paper architecture or a simulation-only story. We’re preparing to offer our first products for purchase in Q3 this year, backed by silicon already proven with actual customer workloads.
That combination sets Primemas apart in a landscape that is still catching up to what’s actually deployable today.
What new features/technology are you working on?
A major focus is near-memory compute, with both CPU and FPGA options. This brings processing closer to where data lives rather than shuttling it across the memory fabric.
We’re also investing heavily in custom chiplet co-development with an emphasis on ultra-fast time-to-market, giving customers a path to tailored silicon without the traditional custom-silicon timeline penalty. On the reliability side, we’re expanding our custom RAS feature set for data center deployments, since pooling memory across more hosts raises the bar for reliability, availability, and serviceability.
How do customers normally engage with your company?
We will be exhibiting at FMS, the Future of Memory and Storage Conference at the Santa Clara Convention Center & Hyatt Regency in Santa Clara, CA from August 4-6, 2026. Please visit us in booth #219 at the show. You can learn more about this conference here.
You can reach out to our business development team at contact@primemas.com.
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