One of the most common things I hear now is that the majority of the fabless semiconductor business will stay at 28nm due to the high cost of FinFETs. I wholeheartedly disagree, mainly because I have been hearing that for many years and it has yet to be proven true. The same was said about 40nm since 28nm HKMG was more expensive, which … Read More
Who Will Get the Next Bite of Apple Chip Business?
Recent reports have Intel displacing Qualcomm as the modem supplier and TSMC as the foundry for the next Apple A10 SoC. That is if you call this a credible report: … Read More
Wafer-Level Chip-Scale Packaging Technology Challenges and Solutions
At the recent TSMC OIP symposium, Bill Acito from Cadence and Chin-her Chien from TSMC provided an insightful presentation on their recent collaboration, to support TSMC’s Integrated FanOut (InFO) packaging solution. The chip and package implementation environments remain quite separate. The issues uncovered in bridging… Read More
Cadence Outlines Automotive Solutions at TSMC OIP Event
I used to joke that my first car could survive a nuclear war. It was a 1971 Volvo sedan (142) that was EMP proof because it had absolutely no semiconductors in the ignition system, just points, condensers and a coil. If you go back to the Model T in 1915 you will see that the “on-board electronics” were not that different. However, today’s… Read More
Xilinx Skips 10nm
At TSMC’s OIP Symposium recently, Xilinx announced that they would not be building products at the 10nm node. I say “announced” since I was hearing it for the first time, but maybe I just missed it before. Xilinx would go straight from the 16FF+ arrays that they have announced but not started shipping, and to the… Read More
How to Build an IoT Endpoint in Three Months
It is often said that things go in big cycles. One example of this is the design and manufacturing products. People long ago used to build their own things. Think of villagers or settlers hundreds of years ago, if they needed something they would craft it themselves. Then came the industrial revolution and two things happened. One… Read More
New Sensing Scheme for OTP Memories
Last week at TSMC’s OIP symposium, Jen-Tai Hsu, Kilopass’s VP R&D, presented A New Solution to Sensing Scheme Issues Revealed.
See also Jen-Tai Hsu Joins Kilopass and Looks to the Future of Memories
He started with giving some statistics about Kilopass:
- 50+ employees
- 10X growth 2008 to 1015
- over 80 patents (including
Four Takeaways from the TSMC OIP 2015
Paul M. did an excellent job summarizing the technical information that TSMC presented at the recent Open Innovation Platform symposium. I’d like to also share an impression on four areas that struck me as key to TSMC’s strategy.… Read More
TSMC OIP: What to Do With 20,000 Wafers Per Day
Today it is TSMC’s OIP Ecosystem Innovation forum. This is an annual event but is also a semi-annual update on TSMC’s processes, investment, volume ramps and more. TSMC have changed the rules for the conference this year: they have published all the presentations by their partners/customers. Tom Quan of TSMC told… Read More
SoC and Foundry Update 2H 2015!
Rarely do I fly first class but I did on my recent trip to Asia. It was one of the new planes with pod-like seats that transforms into a bed. The flight left SFO at 1 A.M. so I fell asleep almost immediately missing the first gourmet meal. About half way through the flight I found myself barely awake staring straight up and what do I see? STARS!… Read More