As you probably know, Synopsys last year acquired VaST and CoWare and a couple of years early had acquired Virtio. All three companies primarily competed in the virtual platform market. In addition, Synopsys is the #2 IP company (behind ARM) and has a wide range of tools for SoC design. So the interesting question is how would they… Read More
EDA Interoperability at DAC
Intro
My Wednesday breakfast at DAC last week was at the Interoperability event sponsored by Synopsys. The Synopsys moderator was so jovial that he reminded me of Jerry Lewis, I was relieved when the guests gave us an update.
Notes
Interconnect Modeling- Open Source Interconnect Technology Format (ITF)o Used by Star RC
–… Read More
Synopsys IC Validator at DAC
Intro
At DAC last week I visited the Synopsys demo suite to see what’s new with IC Validator.
Notes
Stelios Diamantidis, PMM
– In-design physical verification
– Sign-off reveals thousands of late stage DRC violations
– 28nm has 1.5K rules, 15K runset sizes
– Metal Fill changes timing
– The… Read More
HSPICE gets Faster, better Convergence
Hany El Hak – Product Marketing Manager
Frederik Iverson – AE
Scott Wetch – HSPICE Architect
HSPICE – 5 years ago convergence was not so good, while 95% of analog circuits today converge out of the box, no options are required.
Synopsys AMS Portfolio – wide range of tools
– Custom Designer: IC schematic and layout tools
–… Read More
iPDKs and Analog Constraints
Lunch time Monday at DAC and I learned about what’s new at the IPL Alliance in 2011.
IPL Sponsors: Magma, Mentor Graphics, Springsoft, Accelicon, Ciranova, Synopsys, TSMC, TowerJazz, Jedat, Tanner EDA
Two major projects:
1) iPDKS
2) Analog Constraints… Read More
2011 Semiconductor Design Forecast: Partly Cloudy!
This was my first SNUG (Synopsys User Group) meeting as media so it was a ground breaking event. Media was still barred from some of the sessions but hey, it’s a start. The most blog worthy announcement on day 1 was that Synopsys signed a deal with Amazon to bring the cloud to mainstream EDA!
Even more blog worthy was a media roundtable… Read More
Synopsys at Goldman Sachs Technology Conference
Aart de Geus was interviewed at the Goldman Sachs Technology Conference last week. Here is some of what he said. Strong Q1, good Q2 outlook, on-track for 2011 guidance. Strong rebound in Far East, Europe mixed, North America good. 80% revenue for year booked by start of year, 90% revenue for a quarter already booked at start of quarter.… Read More
The Looming IP Explosion
There has been a lot of talk about the fluid role of IP in semiconductor design. With the Synopsys acquisition of Virage Logic the playing field has tilted substantially in favor of Synopsys… or maybe not!
At first glance this acquisition appears to be a huge threat to EDA and IP companies allowing Synopsys to “throw in” IP as… Read More
Aart de Geus ( Synopsys ) for Governor!
Seriously, I would vote for Aart, he would make a great California Governor. You will probably not meet a more fiscally responsible CEO. Synopsys is one of the best run companies in Silicon Valley and was recently rated in the top 25 on social media site glassdoor.com. Aart ( SNPS ) has a 92% approval rate, Wally ( MENT ) 80%, Lip-Bu ( … Read More
EDA / IP Business Model Debate
First, lets review the business model transitions EDA has seen. We started with perpetual licensing which is a software license for the life of the product. EDA companies did their best to change product names to get incremental revenue above and beyond the yearly 15% maintenance fee but that is a dead end business model for a confined… Read More