In the early 1980s, when computer-aided engineering (CAE), the precursor to modern electronic design automation (EDA), was just taking shape, my professional trajectory shifted in a way that would prove foundational. I joined Teradyne, the Boston-based leader in automated test equipment (ATE), and I encountered for the first… Read More
Foundation IP for Intel 18A: Technical Overview and Why It Matters
Synopsys Foundation IP for Intel 18A is a portfolio of semiconductor building blocks designed to help system-on-chip developers build advanced chips with better power, performance, and area, often called PPA. The offering includes embedded memory compilers, standard-cell logic libraries, and input/output libraries for… Read More
When Software Outruns Silicon: Hardware-Assisted Test Generation to the Rescue
For the past decade, the semiconductor industry has been moving in one direction: shift-left, specifically, shifting more validation into the pre-silicon phase. The idea was straightforward: if software ultimately determines how a system behaves, then software should become a primary vehicle for verification.
The industry… Read More
All-Embracing Multiphysics Analysis for Chiplet-Based Systems
What systems can accomplish by combining semiconductors, AI, and software seems at times boundless. Chiplet-based semiconductors deliver this promise, allowing a myriad of complex digital, memory, analog and photonic functions to be condensed into a single semiconductor package for higher performance, lower power consumption… Read More
Podcast EP351: A Detailed Overview of the Emerging Standards for 400G with Kent Lusted
Daniel is joined by Kent Lusted, a Distinguished Architect at Synopsys and an integral part of the company’s Ethernet IP design team. He has been an active contributor and member of the IEEE 802.3 Ethernet PHY standards development leadership team for more than 15 years. Prior to Synopsys, Kent worked at Intel for 30+ years, focused… Read More
Synopsys Unifies Electrical, Thermal, Mechanical, and Optical Analysis with Multiphysics Fusion Solutions
Synopsys has announced the availability of the first wave of its Multiphysics Fusion Solutions, extending its vision of a unified engineering environment that connects EDA, semiconductor physics, system simulation, and artificial intelligence-driven optimization. The announcement addresses one of the most significant… Read More
Customized Foundation IP Enables the Next Generation of Automotive Compute
As vehicles become increasingly software-defined, automotive semiconductor suppliers face growing pressure to deliver higher compute performance while maintaining strict requirements for power efficiency, reliability, and long-term product support. Advanced driver assistance systems (ADAS), electrification, … Read More
Synopsys and Samsung Foundry Extend AI-Driven Design Collaboration for Advanced 2nm and Multi-Die Systems
At SAFE Forum 2026, Synopsys announced significant advancements in its collaboration with Samsung Foundry, expanding AI-powered design, verification, test, and IP solutions for Samsung’s most advanced process technologies. The announcement underscores the growing importance of electronic design automation (EDA), … Read More
Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools
As advanced packaging becomes a critical enabler for next-generation semiconductor products, Intel continues to drive innovation through its Embedded Multi-die Interconnect Bridge (EMIB) technology. EMIB has emerged as a foundational packaging solution for heterogeneous integration, allowing multiple chiplets and… Read More
SRAM compilers targeting automotive SoCs on advanced nodes
Processor IP garners the most attention in SoC design, but it’s not the only IP category begging for smart choices. Every processor core needs to be fed with data; however, frequent off-chip DRAM access incurs a large clock-cycle penalty each time. Architects now want SRAM blocks distributed throughout an SoC, putting data close… Read More

