In 1969 the Internet was born at UCLA when a computer there sent a message to a computer at Stanford. By 1975, there were 57 computers on the ‘internet’. Interestingly in the early seventies I actually used the original Xerox Sigma 7 connected to the internet in Boelter Hall at UCLA. A similar vintage computer is now in this room commemorating… Read More
Semiconductor Intellectual Property
Open-Silicon SerDes TCoE Enables Successful Delivery of ASICs for Next-generation, High-Speed Systems
With 5G cellular networks just around the corner, there is an ever-increasing number of companies working to bring faster communications chips to the market. Data centers are now deploying 100G to handle the increased bandwidth requirements, typically in the form of four 28Gbps channels and that means ASIC designers are looking… Read More
Don’t Miss “The IP Paradox” Panel @ #54 DAC!
Despite the strong consolidation in the semiconductor industry, the Design IP market is still growing: from $3 billion in 2015 to $3.4 billion in 2016. That’s why the DAC IP Committee has organized this panel, titled “The IP Paradox: Growing Business Despite Consolidations” (you can see more on the events page: https://dac.com/events… Read More
The FPGA Business Just Got Interesting Again!
FPGA’s have played an important role in the fabless semiconductor ecosystem which is why it has a full chapter in our book Fabless: The Transformation of the Semiconductor Industry. Along my career path I spent time at a start-up FPGA so I know how hard it is. I worked for GateField which was then acquired by FPGA pioneer Actel… Read More
Worldwide Design IP Revenue Grew 13.1% in 2016, According to Final Results by IPnest
Despite the strong consolidation in the semiconductor industry, the Design IP market is going well, very well with YoY growth of 13.1% in 2016, according with the Design IP Report from IPnest. ARM Group of Softbank (previously known as ARM Holding) is again the strong #1 with IP revenues (licenses plus royalties) of $1,647 million… Read More
CCIX Protocol Push PCI Express 4.0 up to 25G
The CCIX consortium has developed the Cache Coherent Interconnect for Accelerators (X) protocol. The goal is to support cache coherency, allowing faster and more efficient sharing of memory between processors and accelerators, while utilizing PCIe 4.0 as transport layer. With Ethernet, PCI Express is certainly the most popular… Read More
Active Voice
Voice activated control, search, entertainment and other capabilities are building momentum rapidly. This seems inevitable – short of Elon Musk’s direct brain links, the fastest path to communicate intent to a machine is through methods natural to us humans: speech and gestures. And since for most of us speech is a richer… Read More
Is ARC HS4xD Family More a CPU or DSP IP Core?
When I had to define the various IP categories (processor, analog & mixed-signal, wired interfaces, etc.) to build the Design IP Report, I scratched my head for a while about the processor main category: how to define the sub-categories? Not that long ago, it was easy to identify a CPU IP core and a DSP IP core. As of today, if a DSP… Read More
Embedded FPGA IP update — 2nd generation architecture, TSMC 16FFC, and a growing customer base
Regular Semiwiki readers are aware that embedded FPGA (eFPGA) IP development is a rapidly growing (and evolving) technical area. The applications for customizable and upgradeable logic in the field are many and diverse — as a result, improved performance, greater configurable logic capacity/density, and comprehensive… Read More
Understanding Sources of Clock Jitter Critical for SOC’s
Jitter issues in SOC’s reside at the crossroads of analog and digital design. Digital designers would prefer to live in a world of clocks that are free from jitter effects. At the same time, analog designers can build PLL’s that are precise and finely tuned. However, when a perfectly working PLL is inserted into an SOC, things can … Read More
Siemens U2U 3D IC Design and Verification Panel