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EDA

Electronic Design Automation

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Webinar -New Concepts in Semiconductor IP Lifecycle Management

Webinar -New Concepts in Semiconductor IP Lifecycle Management
by Daniel Payne on 05-26-2017 at 7:00 am
Categories: EDA, Events, Perforce

The semiconductor IP market continues growing at a healthy rate, and IP reuse is a staple of all modern SoC designs. Along with the acceptance of IP reuse comes a host of growing challenges, like:

  • Increase in design files
  • Increase in meta-data
  • More links between design members worldwide
  • More links between data in multiple engineering
… Read More
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CPU, GPU, H/W Accelerator or DSP to Best Address CNN Algorithms?

CPU, GPU, H/W Accelerator or DSP to Best Address CNN Algorithms?
by Eric Esteve on 05-25-2017 at 7:00 am
Categories: Automotive, Cadence, EDA
2 Comments

If you read an article dealing with Convolutional Neural Network (CNN), you will probably hear about the battle between CPU and GPU, both off-the-shelf standard product. Addressing CNN processing needs with standard CPU or GPU is like having to sink a screw when you only have a hammer or a monkey wrench available. You can dissert… Read More

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Time is Money, Especially when Testing ICs

Time is Money, Especially when Testing ICs
by Daniel Payne on 05-24-2017 at 12:00 pm
Categories: EDA, Siemens EDA

Semiconductor companies are looking for ways to keep their business profitable by managing expenses on both the design and test side of electronic products, which is quite the challenge as the trends show increases in test pattern count and therefore test costs. Scan compression is a well-known technique first created over 15… Read More

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Webinar: Getting to Accurate Power Estimates Earlier and Faster

Webinar: Getting to Accurate Power Estimates Earlier and Faster
by Bernard Murphy on 05-24-2017 at 7:00 am
Categories: EDA, Events, Synopsys

Power has become a very important metric in modern designs – for mobile and IoT devices which must live on a battery charge for days or years, for datacenters where power costs can be as significant as capital costs, and for increasingly unavoidable regulatory reasons. But accurate power estimation on a design must start from an … Read More

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CDC Verification for FPGA – Beyond the Basics

CDC Verification for FPGA – Beyond the Basics
by Bernard Murphy on 05-23-2017 at 12:00 pm
Categories: EDA, FPGA, Synopsys

FPGAs have become a lot more capable and a lot more powerful, more closely resembling SoCs than the glue-logic we once considered them to be. Look at any big FPGA – a Xilinx Zynq, an Intel/Altera Arria or a Microsemi SmartFusion; these devices are full-blown SoCs, functionally different from an ASIC SoC only in that some of the device… Read More

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Webinar – Low Power Circuit Sizing for IoT

Webinar – Low Power Circuit Sizing for IoT
by Tom Simon on 05-19-2017 at 7:00 am
Categories: EDA, Events, IoT, MunEDA

Optimizing analog designs has always been a difficult and tricky process. Designing for IoT applications has only made this more difficult with the added importance of minimizing power. Unlike other circuit parameters, it is not easy to specify power as a design goal when using equations. Power is a resultant property and must… Read More

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Understanding ISO 26262 Compliance for Automotive Suppliers

Understanding ISO 26262 Compliance for Automotive Suppliers
by Daniel Payne on 05-18-2017 at 12:00 pm
Categories: Automotive, EDA, Events, Jama Software
6 Comments

The semiconductor, IP, Software and EDA industries are all focusing on the growing automotive market because of its electronic content, size and growth. There are long-time suppliers to the automotive industry, and also first-time vendors that are launching something new every week for electronics in automotive. So where … Read More

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Electrothermal Analysis of an IC for Automotive Use

Electrothermal Analysis of an IC for Automotive Use
by Daniel Payne on 05-16-2017 at 12:00 pm
Categories: Automotive, EDA, Siemens EDA
20 Comments

Automotive ICs have to operate in a very demanding environment in terms of both temperature and voltage ranges, along with the ability to withstand g-forces and be sealed from the elements. Not an easy design challenge. For many consumer ICs we see output drive currents on the IO pins measured in mA, however in automotive if you want… Read More

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High Frequency Trading and EDA

High Frequency Trading and EDA
by Bernard Murphy on 05-16-2017 at 7:00 am
Categories: Aldec, EDA, FPGA

Pop quiz – name an event at which an EDA vendor would be unlikely to exhibit. How about The Trading Show in Chicago, later this month? That’s trading as in markets, high-frequency trading, blockchain and all that other trading-centric financial technology. This is another market, like cloud, where performance is everything and… Read More

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Building Better Digital Content Protection

Building Better Digital Content Protection
by Tom Simon on 05-15-2017 at 12:00 pm
Categories: IP, Synopsys

Back in college my roommates figured out that the TV cable coax wire was still connected to our apartment. As a result, I was able to watch the Richard Pryor movie Silver Streak about 30 times without a cable box, however the screen was partially jumbled from the simple content protection used back then. This was possible by aggressively… Read More