WP_Term Object
(
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 262
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 262
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157
    [is_post] => 
)
            
3dic banner 800x100
WP_Term Object
(
    [term_id] => 34
    [name] => Ansys, Inc.
    [slug] => ansys-inc
    [term_group] => 0
    [term_taxonomy_id] => 34
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 262
    [filter] => raw
    [cat_ID] => 34
    [category_count] => 262
    [category_description] => 
    [cat_name] => Ansys, Inc.
    [category_nicename] => ansys-inc
    [category_parent] => 157
    [is_post] => 
)

Apache Design Automation acquired by Ansys

Apache Design Automation acquired by Ansys
by Daniel Payne on 06-30-2011 at 2:52 pm

We all knew that Apache had filed for an IPO earlier and were just waiting for the timing and price to be revealed. Rumors have been circulating about an acquisition and today we know that the rumors were true asAnsys paid $310 million in cash for Apache.

Ansys stock has surged some 35% over the past twelve months:

Products
This acquisition… Read More


Smartphones in the BRICs

Smartphones in the BRICs
by Paul McLellan on 06-24-2011 at 2:45 pm

The latest edition of GSA Forum has an article by Aveek Sarkar of Apache on system design for emerging market needs. The BRIC (Brazil, Russia, India, China) type countries are characterized by a small rich segment, a large and growing middle class and a large poor segment. One big trend is that smart phone use is expanding very fast.… Read More


Analyzing and Planning Electro-static Discharge (ESD) Protection

Analyzing and Planning Electro-static Discharge (ESD) Protection
by Paul McLellan on 05-23-2011 at 5:00 am

ESD has historically been a big problem analyzed with ad-hoc approaches. As explained earlier, this is no longer an adequate way to plan nor signoff ESD protection.

Pathfinder is the first full-chip comprehensive ESD planning and verification solution. It is targeted to address limitations in today’s methodologies.… Read More


Electro-static Discharge (ESD)

Electro-static Discharge (ESD)
by Paul McLellan on 05-18-2011 at 4:26 pm

Electro-static discharge (ESD) has been a problem since the beginning of IC production. Chips function on power supplies of up to a few volts (depending on the era) whereas ESD voltages are measured in the thousands of volts. When you reach out for your car door handle and a spark jumps across, that is ESD. If you were touching a chip… Read More


Chip Power Models

Chip Power Models
by Paul McLellan on 05-04-2011 at 4:21 pm

As the complexity of the chip-package-system (CPS) interactions has increased, the tradeoffs in doing a power and noise analysis has had to gradually increase. As is so often the case in semiconductor designs, issues first arise as second-order effects that can largely be ignored but each process node makes the problem worse … Read More


Apache at DAC

Apache at DAC
by Paul McLellan on 05-04-2011 at 2:38 pm

DAC is less than a month away, June 6-8th for the tradeshow, longer depending on what other events you might also be attending. Apache is in booth 2448 (marked in red on the DAC floorplan map.

Many of the presentations at the Apache booth will be customers (such as ARM, Xilinx, ST Ericsson, GlobalFoundries and TSMC) discussing various… Read More


Semiconductor RTL Power Analysis: the sweet spot

Semiconductor RTL Power Analysis: the sweet spot
by Paul McLellan on 04-26-2011 at 4:20 pm

Power has become the strongest driver of semiconductor design today, more important than area, more important than timing. Whether the device is handheld, like a wireless phone, or tethered, like a router, complex power and energy requirements must be met. Shrinking geometries continue to impose new challenges as power management… Read More


Chip-Package-System (CPS) Co-design

Chip-Package-System (CPS) Co-design
by Paul McLellan on 04-14-2011 at 5:13 pm

I can still remember the time, back in the mid-1980s, when I was at VLSI and we first discovered that we were going to have to worry about package pin inductance. Up until then we had been able to get away with a very simplistic model of the world since the clock rates weren’t high enough to need to worry about the package and PCB as… Read More


Andrew Yang’s presentation at Globalpress electronic summit

Andrew Yang’s presentation at Globalpress electronic summit
by Paul McLellan on 03-30-2011 at 3:15 pm

Yesterday at the Globalpress electronic summit Andrew gave an overview of the Apache product line, carefully avoiding saying anything he cannot due to the filing of Apache’s S-1. From a financial point of view the company has had 8 years of consecutive growth, is profitable since 2008, and has no debt. During 2010 when the… Read More


Apache files S-1

Apache files S-1
by Paul McLellan on 03-14-2011 at 3:50 pm

Apache Design Solutions today filed their S-1 with the SEC in preparation for its initial public offering (IPO). This is a big deal since there hasn’t been an IPO of an EDA company for may years (Magma was the last 10 years ago). As a private company they have not had to reveal their financials until now.

It turns out that they did… Read More