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One of the great advantages of emulation is that runtimes are much faster than for simulation – sufficiently fast that you can really debug hardware together with software for comprehensive use-case testing. A not so great aspect is that emulators are expensive and, until relatively recently, not particularly easy to share across… Read More
Integrated wafer-level fanout (WLFO) packaging technology is emerging as a foundation for multi-die solutions. Mobile product applications require focus on both aggressive chip-to-chip interface performance, as well as the final package volume. Traditional multi-chip packages using PCB laminate substrates do not readily… Read More
The EDA tools industry relies upon ongoing productivity enhancements to existing products, to manage increasing SoC complexity and to address shrinking design schedules. The source of ideas for enhancements can come from a variety of sources – e.g., customer feedback, collaboration with the foundries, and features found … Read More
When you think of a DSP IP, you tend to think of very targeted applications – for baseband signal processing or audio or vision perhaps. Whatever the application, sometimes you want a solution optimally tuned to that need: best possible performance and power in the smallest possible footprint. These needs will continue,… Read More
Formal verification for hardware was stuck for a long time with a reputation of being interesting but difficult to use and consequently limited to niche applications. Jasper worked hard to change this, particularly with their apps for JasperGold and I have been seeing more anecdotal information that mainstream adoption is growing.… Read More
The best things in life may not always be free, but they don’t have to be incredibly difficult to get to. A challenge for IoT designers has been that their bubbling excitement over the potential of their new gizmo is quickly tempered by the complexities of actually building the hardware. Not exactly what they have come to expect in … Read More
Every day I read stuff about the coming of fully autonomous vehicles, and it’s not every day we get a technologist’s view of the hurdles faced in getting there. Chris Rowen, CTO of Cadence’s IP group, gave one of the best presentations I’ve seen on ADAS technology and convolutional neural networks (CNNs) at #53DAC, pointing… Read More
IC design challenges are different at advanced nodes like 7nm, so to learn more about the topic I attended a panel luncheon at DAC sponsored by Cadence. The moderator was both funny and technically astute, quite the rare combination, so kudos to Professor Rob Rutenbar, a former Neolinear guy now at the University of Illinois. Panelists… Read More
Many years ago I read a great little book by Rudy Rucker called “Infinity and the Mind”. This book attempts to explain the many classes of mathematical infinity (cardinals) to non-specialists. As he gets to the more abstract levels of infinity, the author has to resort to an analogy to give a feel for extendible and other cardinal … Read More
For bloggers like myself spending four days at #53DAC is almost a non-stop blur of activity, visiting EDA vendors, IP providers and foundries to learn about what’s happening in our semiconductor industry. Cadence is both an EDA vendor and IP provider, so DAC is a great showcase for them to tell us what’s new in 2016 and… Read More
Podcast EP16: Hyperscale Computing & Changes in the Datacenter
Podcast EP90: A Tour of Cadence’s Cloud Solutions with Mahesh Turaga
Podcast EP105: Cadence STA Strategy and Capabilities, Today and Tomorrow with Brandon Bautz
Podcast EP112: How Cadence is Revolutionizing Full-Chip Signoff with Certus
Podcast EP255: The Growing Proliferation of Semiconductors and AI in Cars with Amol Borkar
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