Siemens is the True Catalyst for Secure and Trusted Digital Transformation

Siemens is the True Catalyst for Secure and Trusted Digital Transformation
by Mike Gianfagna on 10-27-2020 at 8:00 am

Siemens Ecosystem Workflow for Secure Trusted Digital Transformation

Introduction

For many years, I pondered the ultimate future of EDA. Companies such as Oracle, SAP and Dassault provide a huge array of enabling software infrastructure for the enterprise, including product design, mechanical design, project management and materials sourcing. But not for the all-important tasks of chip and… Read More


Synopsys Enhances Chips and Systems with New Silicon Lifecycle Management Platform

Synopsys Enhances Chips and Systems with New Silicon Lifecycle Management Platform
by Mike Gianfagna on 10-26-2020 at 6:00 am

Silicon Lfecycle Management

SLM.  It’s a TLA (three-letter acronym) that you’ll be hearing more about. It stands for silicon lifecycle management and it has the potential of re-defining the role of EDA in the entire electronics ecosystem. A working definition of SLM is “monitoring, analysis and optimization of semiconductor devices as they are designed,… Read More


Flex Logix Brings AI to the Masses with InferX X1

Flex Logix Brings AI to the Masses with InferX X1
by Mike Gianfagna on 10-22-2020 at 10:00 am

InferX X1 PCIe board

In April, I covered a new AI inference chip from Flex Logix. Called InferX X1, this part had some very promising performance metrics. Rather than the data center, the chip focused on accelerating AI inference at the edge, where power and form factor are key metrics for success. The initial information on the chip was presented at … Read More


Synopsys Teams with IBM to Increase AI Compute Performance 1,000X by 2029

Synopsys Teams with IBM to Increase AI Compute Performance 1,000X by 2029
by Mike Gianfagna on 10-21-2020 at 7:30 am

Synopsys Teams with IBM to Increase AI Compute Performance 1000X by 2029

Anyone who frequents SemiWiki will likely know Moore’s Law. The prediction made by Gordon Moore over 50 years ago regarding the relentless increase in transistor density and reduction in cost has tracked well for a very, very long time. In recent years, there has been spirited discussion about the end of Moore’s Law. This is a discussion… Read More


yieldHUB – Helping Semiconductor Companies be More Competitive

yieldHUB – Helping Semiconductor Companies be More Competitive
by Mike Gianfagna on 10-19-2020 at 6:00 am

yieldHUB webinar

The semiconductor industry is fiercely competitive. This is widely known by the SemiWiki community. When it comes to critical design parameters such as power, performance or area you’re either in the envelope that defines the market or you’re not a player. Yield management has a similar impact. Those who can stay ahead of the yield… Read More


Concurrency and Collaboration – Keeping a Dispersed Design Team in Sync with NetApp

Concurrency and Collaboration – Keeping a Dispersed Design Team in Sync with NetApp
by Mike Gianfagna on 10-14-2020 at 10:00 am

Concurrency and Collaboration – Keeping a Dispersed Design Team in Synch with NetApp

 

In a recent post, I discussed how NetApp provides comprehensive support for moving your EDA flow to the cloud. In that post, I explored the tools, technologies and services that help design organizations move to the cloud in a coherent, predictable, and incremental manner. Having a smooth-running hybrid/on-premise or… Read More


A Look Inside the Cloud at the Arm DevSummit 2020

A Look Inside the Cloud at the Arm DevSummit 2020
by Mike Gianfagna on 10-13-2020 at 10:00 am

Executive roundtable speakers

Virtual conferences are getting better all the time. Easy-to-navigate agendas, good production value in terms of visual presentation, professionally produced video segments and interspersed live events all contribute to the experience. Arm held their developers’ summit in the US on October 6-8, and it had all the attributes… Read More


Tempus: Delivering Faster Timing Signoff with Optimal PPA

Tempus: Delivering Faster Timing Signoff with Optimal PPA
by Mike Gianfagna on 10-12-2020 at 10:00 am

Tempus Delivering Faster Timing Signoff with Optimal PPA

In July, I explored the benefits of the new Cadence Tempus™ Power Integrity Solution. In that piece, I explored some of the unique capabilities of this new tool with Brandon Bautz, senior product management group director and Hitendra Divecha, product management director in the Digital & Signoff Group at Cadence. I recently… Read More


yieldHUB – A Yield Management Checklist for Startups and a New Look

yieldHUB – A Yield Management Checklist for Startups and a New Look
by Mike Gianfagna on 10-08-2020 at 10:00 am

yieldHub – A Yield Management Checklist for Startups and a New Look

In July, I covered a webinar that described how yieldHUB helps bring a new product to market. That webinar described how to implement new production introduction (NPI) using an array of tools and techniques that should be part of any semiconductor enterprise. In a recent article published by yieldHUB, they took a few steps back … Read More


Webinar: Addressing the Challenges of Hyper-scaling within Data Centers with Advanced Node Embedded Sensing Fabrics

Webinar: Addressing the Challenges of Hyper-scaling within Data Centers with Advanced Node Embedded Sensing Fabrics
by Mike Gianfagna on 10-06-2020 at 10:00 am

Webinar Reminder Image

I had a chance to preview the subject webinar recently.  Yes, it’s a long title, but a very important topic. When it comes to hyper-scale data centers, there are substantial challenges associate with thermal management, power distribution and processing performance. Moortec explores approaches to these issues using their … Read More