WP_Term Object
(
    [term_id] => 55
    [name] => SmartDV
    [slug] => smartdv
    [term_group] => 0
    [term_taxonomy_id] => 55
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 7
    [filter] => raw
    [cat_ID] => 55
    [category_count] => 7
    [category_description] => 
    [cat_name] => SmartDV
    [category_nicename] => smartdv
    [category_parent] => 178
)
            
semiwiki banner smartdv
WP_Term Object
(
    [term_id] => 55
    [name] => SmartDV
    [slug] => smartdv
    [term_group] => 0
    [term_taxonomy_id] => 55
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 7
    [filter] => raw
    [cat_ID] => 55
    [category_count] => 7
    [category_description] => 
    [cat_name] => SmartDV
    [category_nicename] => smartdv
    [category_parent] => 178
)

SmartDV Expands Its Design IP Portfolio with an Acquisition

SmartDV Expands Its Design IP Portfolio with an Acquisition
by Mike Gianfagna on 12-29-2020 at 6:00 am

SmartDV Expands Its Design IP Portfolio with an Acquisition

Back in April, I posted a blog about SmartDV, The Quiet Giant in Verification IP and More. This is a story about the “more” part of that statement. Acquisition activity in the semiconductor sector has been quite brisk this year. A bright spot in what could otherwise be a sometimes-overwhelming series of bad news. Acquisition has been a focus at SmartDV as well. The company recently announced the acquisition of a new line of design IP controllers for high-speed communications.  Here is a bit more color on that announcement and how SmartDV expands its design IP portfolio with an acquisition.

What Was Announced

The announcement centers on the acquisition of a design IP business and products from a leading, pure-play engineering services company. The identity of the company and the price tag of the acquisition were not disclosed. Independent of those items, there is a lot to the story that highlights the strength and significance of this acquisition. A key piece of information is that the IP portfolio is silicon-proven and includes minimal area controller IP for popular standards including mobile and mobile-Influenced (MIPI) and universal serial bus (USB) interfaces.

The Importance of Silicon Validation

Silicon validation of standards-based IP like this is a critical item to reduce risk and time-to-market. Since the IP is coming from an engineering services company, silicon validation will be a key benefit. The release reports all the IP titles are implemented in numerous chip design projects and a variety of consumer electronics devices. Having worked at a company that offered IP and ASICs (eSilicon), I can tell you this is key differentiator. At eSilicon, we didn’t just design IP blocks and do one test chip for characterization before offering it for sale. Instead, we would use these IP titles in our ASIC business on real production chips. The validation from this kind of activity is quite a bit more robust than a characterization test chip alone.  

Deepak Kumar Tala, SmartDV’s managing director commented on the fit of the IP portfolio and its source. “The acquisition of a Design IP portfolio strengthens our offerings for mobile and high-speed communications application markets. The purchase comes from a company noted for exceptional customer support and service. With this reputation, its high-quality, highly configurable and silicon-proven Design IP is a good fit for SmartDV’s standards.”

The Details

The portfolio is quite extensive and includes:

MIPI

  • MIPI camera serial interface (CSI-2) transmitter and receiver controller design IP for C-PHY and D-PHY
  • MIPI display serial interface (DSI) and DSI-2 transmitter and receiver design IP for C-PHY and D-PHY
  • MIPI CSI-3 host and device design IP
  • Universal flash storage (UFS) interface 2.1 and 3.0 host and device design IP
  • MIPI unified protocol (UNIPRO) controller 1.6 and 1.8 design IP
  • I3C interface master and slave controller design IP

USB

  • Silicon-proven and USB-Implementers Forum (USB-IF) certified
    • USB 1.1/2.0 device controller
    • x 5G device controller
    • x 5G host controller
    • x 5G hub controller
    • x 5G dual-role controller
  • USB-IF certified
    • x 10G device controller
  • Verified and FPGA validated
    • USB On-The-Go (OTG)
    • USB SuperSpeed Inter-Chip (SSIC)
    • 0 xHCI host controller
  • Design Ready
    • 0 device router

Availability and To Learn More

Licenses for the new IP include validation platforms along with firmware support to functionally validate chip design prior to tape out and mitigate risk. All controller design IP is pre-verified and delivered as a comprehensive solution, complete with a verification suite, clock domain crossing, synthesis and logic equivalence checking constraints and waivers, as applicable. They are reusable at the system-on-chip (SoC) level and proven interoperable with partner PHY solutions. I can tell you from first-hand experience interoperability between the controller and PHY is really important, this is a key benefit.

The new portfolio is available now and backed by an experienced team. Pricing is available upon request. You can email requests for data sheets or more information to sales@Smart-DV.com. The news is true, SmartDV expands its design IP portfolio with an acquisition.

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