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CEO Interview: Deepak Kumar Tala of SmartDV

CEO Interview: Deepak Kumar Tala of SmartDV
by Daniel Nenni on 06-22-2020 at 10:00 am

SmartDV CEO Interview 2020

SMARTDV is one of the biggest small EDA companies in the industry today in regards to products, customers and number of licenses in use, absolutely.  They have a portfolio of more than 600 Design & Verification Solutions, everything from Design & Verification IP to Formal Verification IP, Post-Silicon Verification IP & Synthesizable Transactors.

Semiwiki first encountered SmartDV in 2015 and in my experience verification and IP go together like peas and carrots so let’s get a quick update. You can also spend quality time with SmartDV at this year’s Virtual DAC, sign up HERE. It is free if you love DAC!

Who is SmartDV?
We are a group of more than 250 experienced ASIC and SoC design and verification engineers based in Bangalore, India, dedicated to offering the largest selection of high-quality Design and Verification IP solutions. Our U.S. headquarters is in San Jose, Calif.

When did you form SmartDV?
We formed in 2007 and are celebrating our 13th anniversary this month. While our product portfolio expanded beyond providing verification IP only into a complete line of design and verification solutions, our goal to be a committed and trustworthy IP vendor who provides on-demand support remains the same.

Why did you start SmartDV?  What opportunities drove you?
We saw an opportunity to move a strictly transactional business to a service-oriented business where one size IP does not fit all SoC design groups. Servicing users is an important part of our business model since many project groups are in need of tailored, customized IP.

Initially, we served an unfulfilled need for quality verification IP, an essential piece of any verification strategy, given that verification consumes approximately 70% of a project schedule.

Our projections proved to be accurate. The IP provider business has matured into a large, viable segment of the electronics supply chain and a multi-billion dollar business. The revenue, according to the most recent ESD Alliance Market Statistics Service (MSS) news release, totaled $900.6 million in Q4 2019, a 4 percent increase compared to Q4 201. The four-quarters moving average increased 10.1 percent.

What is SmartDV’s core strength?
When I think of our core strengths, I think first and foremost about our exceptionally talented engineering group with expertise that spans design and verification. That expertise, commitment and responsiveness to our user community as well as our broad product portfolio is what makes our customer service and support stand out from our competition. As a result, we have a proven track record with a large, repeat user base and our solutions are used in hundreds of design projects throughout the global electronics industry.

Our engineering group continually delivers up-to-date design and verification IP products that gives us the largest, most extensive solutions offering that has grown over the last 13 years. Our products range today from Design and Verification IP, Formal (assertion) Verification IP, Post-Silicon Verification IP to SimXL, a portfolio of synthesizable transactors for accelerating system-level, SoC testing on hardware emulators or FPGA prototyping platforms.

A point of pride for us is our proprietary automated compiler-based technology for rapid development and deployment of new design and verification IP to support new industry standard protocols. The compiler gives us the ability to customize any of our design and verification solutions to meet specific customer design needs. This ensures quick delivery of products compliant with standard protocol specifications for new or evolving networking, storage, automotive, bus, MIPI, display and defense and aerospace applications. Consequently, we often deliver first-to-market design and verification solutions simultaneous to a new industry protocol standard’s availability.

It’s for these reasons that SmartDV Technologies has the reputation for being the Proven and Trusted choice for Smart Design and Verification Solutions.

What’s new with SmartDV?
We reached a milestone last month with availability of more than 600 Design and Verification solutions, an achievement that gives all of us great satisfaction. I credit our experienced and tireless development group, our active participation in standards organizations and our proprietary compiler. It gives us the competitive advantage to quickly produce and market a host of products to support the chip design and verification process.

Our most recent product news is delivery of a series of video, imaging and entertainment system design IP compliant with a variety of standard protocol specifications, including:

  • V-by-One, a high-speed serial video interface for HDTV
  • VESA DSC (Display Stream Compression), a video compression and decompression standard
  • HDCP 2.3 (High-Bandwidth Digital Content Protection) used to encrypt and authenticate digital signals for copyright-protected media, including movies, TV shows and audio
  • HDMI CEC (Consumer Electronics Control), a feature of HDMI that allows devices connected to HDMI to be controlled by just one remote
  • HDMI eARC (enhanced Audio Return Channel), an HDMI feature that enables high-quality digital audio to be sent back from the TV via HDMI
  • CXP (CoaXpress), a high-speed imaging standard for serial transmission of video and still images
  • SLVS-EC (Scalable Low Voltage Signaling with Embedded Clock), a high-speed serial interface scheme for image data transmission

What markets and applications does SmartDV support?
Our design and verification solutions are used in hundreds of audio, video and multimedia, automotive, communications, computing, networking, security, storage, memory, wireless and mobile chip projects.

Instead of applications, I’ll focus on differentiation. We offer a distinct advantage and unique capabilities unmatched by in-house resources. Our engineering group can verify the correct functionality and compliance with an industry standard of the production-proven core through a full test suite of functional coverage models. Each Verification IP block for emulation and FFGA prototyping, for example, comes as synthesizable RTL code and full API compatibility to move designs from simulation to emulation. Our experience from working with other users on previous tapeouts gives us the know how to find hard-to-find design bugs. Our various support options and customization can help meet a verification engineering group’s needs.

What trends is SmartDV tracking?
As you might expect, we actively track new industry standards or updates to existing industry standards so we can be first to market with our IP.

RISC-V is interesting to us, as it is to everyone else in the semiconductor industry and it will bring change to the verification landscape. What will change is unknown, which is why we’re tracking it so carefully.


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