Taylor Barton is a Lead Analog/Mixed-Signal and I/O IC Design Engineer at Certus Semiconductor, where he has worked since December 2022. He has designed more than 20 silicon-proven I/O and ESD libraries and has led analog and I/O IP projects, including ADC and SerDes designs. Taylor holds B.S. and M.S. degrees in Electrical Engineering… Read More
Author: Daniel Nenni
CTO Interview with Taylor Barton of Certus Semiconductor
GSA Honors Sanjay Mehrotra as Memory Takes Center Stage in Computing
The Global Semiconductor Alliance will present Micron Technology Chairman and CEO Sanjay Mehrotra with its 2026 Dr. Morris Chang Exemplary Leadership Award, recognizing a career that connects foundational flash memory innovation with the demands of modern computing. The presentation is scheduled for GSA’s Annual Awards… Read More
NIST Sets a Clearer Course for the Post-Quantum Security Transition
NIST’s report, Transition to Post-Quantum Cryptography Standards, gives government agencies and technology suppliers a clearer framework for replacing cryptography vulnerable to future quantum computers. Its significance extends beyond selecting algorithms: it connects security priorities, application requirements… Read More
CTO Interview with Ed Plowman of Imagination Technologies
Ed Plowman is Chief Technology Officer at Imagination Technologies, where he leads technology strategy, advanced architecture research and long-term innovation initiatives. He focuses on the convergence of graphics, compute and artificial intelligence, helping shape the next generation of efficient and adaptable computing… Read More
Ceva’s next NeuPro generation opens new possibilities across AI
Ceva is broadening the possibilities for AI silicon with a new generation of its NeuPro neural processing unit portfolio, bringing a common architecture and unified software environment to applications spanning sensors, intelligent devices and cloud infrastructure.
Announced on October 28, the portfolio reflects an opportunity:… Read More
How Allegro MicroSystems Increased OEE by Several Percentage Points with yieldHUB Live
Allegro MicroSystems’ experience with yieldHUB Live shows how better use of production data can translate into measurable manufacturing gains. At its high-volume semiconductor operation in the Philippines, Allegro set out to improve overall equipment effectiveness, or OEE, by one percentage point. According to the customer… Read More
Interview with Sweta Gupta, VP of Engineering of Analog Bits
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Ms. Gupta has been a part of the Analog Bits team since 2004 and she has successfully managed and delivered high quality IP’s including low jitter PLL’s, low power crystal… Read More
Intel’s Tiny Bridges Could Lead to Very Big Paychecks
Intel’s next big opportunity could come from something that sounds spectacularly unglamorous: connecting tiny pieces of silicon. Advanced packaging rarely attracts the attention lavished on powerful processors or artificial intelligence models. Yet it increasingly determines how effectively those technologies perform.… Read More
CEO Interview with Vera Yang of Flexcompute
Vera Yang is President and Co-Founder of Flexcompute, a frontier AI lab building a Physics World Model that bridges data-driven AI and the laws of physics. She focuses on the problems where the stakes are highest and the physics hardest, including photonic chips for AI data centers, advanced semiconductor packaging and spacecraft… Read More
High-NA’s Obituary Was Premature
High numerical aperture EUV lithography was supposed to be the next step in semiconductor manufacturing. Then came the doubts: expensive scanners, smaller exposure fields, difficult economics and big customers finding ways to stretch existing equipment. It became tempting to confuse a delayed adoption curve with a technology… Read More
Jensen Huang and the Cost of Unchecked Influence