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Upcoming Events

AI Hardware Summit

September 17 - September 18
CDNLive Israel 2019

September 18
IESF Automotive

September 18 @ 8:00 am - 5:00 pm
DataConnectors Phoenix

September 19
Introduction to Mentor Graphics’ Analog...

September 21

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Reusing Your IPs & PDKs Successfully With Cadence® Virtuoso®

Taiwan ESD Workshop Recording

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Finding Your Way Through Verification (Text)

REPLAY: GPU-Powered SPICE: The Way Forward for Analog Simulation

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August 5, 2019August 19, 2019

eFPGA – What a great idea! But I have no idea how I’d use it!

eFPGA – What a great idea! But I have no idea how I’d use it!
by Daniel Nenni on 08-05-2019 at 10:00 am
Categories: eFPGA, Events, Flex Logix

eFPGA stands for embedded Field Programmable Grid Arrays. An eFPGA is a programmable device like an FPGA but rather than being sold as a completed chip it is licensed as a semiconductor IP block. ASIC designers can license this IP and embed it into their own chips adding the flexibility of programmability at an incremental cost.… Read More

August 1, 2019August 4, 2019

GPU-Powered SPICE – Understanding the Cost

GPU-Powered SPICE – Understanding the Cost
by Daniel Nenni on 08-01-2019 at 10:00 am
Categories: EDA, Empyrean, Events
2 Comments

To deploy a GPU-based SPICE solution, you need to understand the costs involved. To get your hands on this new report analyzing this specific issue, all you need to do is attend Empyrean’s upcoming webinar, “GPU-Powered SPICE: The Way Forward for Analog Simulation,” which will be held on Thursday, August 8, 2019, at 10:00 am (PDT).… Read More

July 29, 2019August 1, 2019

Taking the pain out of UVM

Taking the pain out of UVM
by Daniel Nenni on 07-29-2019 at 5:00 am
Categories: Breker Systems, EDA, Events

If you are interested in gaining a deeper understanding of the many ways you can leverage the Universal Verification Methodology (UVM), Breker Verification Systems has gone to a lot of effort to put that information at your fingertips.

A technical subcommittee of Accellera voted to establish the UVM in December 2009. UVM was based… Read More

July 26, 2019August 4, 2019

SemiWiki Webinar Series: Who Wants to do a Webinar?

SemiWiki Webinar Series: Who Wants to do a Webinar?
by Daniel Nenni on 07-26-2019 at 10:00 am
Categories: Events

Webinars have been a popular form of communication since even before SemiWiki existed and they are a mainstay in today’s fast-moving semiconductor ecosystem.

In the past, SemiWiki has assisted with more than a hundred webinars. Today SemiWiki can do a complete webinar from start to finish using the GotoWebinar software. SemiWiki… Read More

July 24, 2019August 17, 2019

The Flash and the Taiwan ESD Seminar!

The Flash and the Taiwan ESD Seminar!
by Daniel Nenni on 07-24-2019 at 6:00 am
Categories: EDA, Events, Magwel

During my trip through Asia last week I attended the Taiwan ESD Workshop. Hsinchu is densely populated with some of the smartest semiconductor people in the world so it is well worth the trip, absolutely. As it turns out ESD is one of the top concerns in semiconductor design and manufacture. The current rule based and simulation … Read More

July 12, 2019July 11, 2019

Are the 100 most promising AI start-ups Prototyping?

Are the 100 most promising AI start-ups Prototyping?
by Daniel Nenni on 07-12-2019 at 10:00 am
Categories: AI, Prototyping, S2C

I came across a report on the 100 most promising AI start-ups. The report claimed that CBInsights had “selected the 100 most promising AI start-ups from a pool of 3K+ companies based on several factors …” Wait, what … 3K+ companies!?!? This was a stunning reminder of the sheer magnitude of what is shaping up to be a veritable tsunami… Read More

July 8, 2019July 12, 2019

Early IP Block Error Detection is Critical!

Early IP Block Error Detection is Critical!
by Daniel Nenni on 07-08-2019 at 10:00 am
Categories: EDA, Fractal Technologies, IP

The rising complexity of modern SoC designs, as enabled by progressing manufacturing technology, leads to an increasing validation challenge as the only way to manage complexity increase is by re-using more pre-designed IP blocks. These IP-blocks are provided by various suppliers such as a foundry partner, internal design… Read More

July 2, 2019July 12, 2019

An Important Next Step for Portable Stimulus Adoption

An Important Next Step for Portable Stimulus Adoption
by Daniel Nenni on 07-02-2019 at 5:00 am
Categories: Amiq EDA, EDA

Portable stimulus has been a hot topic for a couple of years in the EDA and semiconductor industries. Many observers see this approach as the next major advance in verification beyond the Universal Verification Methodology (UVM), and the next step higher in abstraction for specifying verification intent. The basic idea is to … Read More

June 28, 2019June 28, 2019

2019 GSA Silicon Summit and SiFive

2019 GSA Silicon Summit and SiFive
by Daniel Nenni on 06-28-2019 at 8:00 am
Categories: Events, IP, RISC-V, SiFive
2 Comments

Naveed Sherwani, President and CEO of SiFive, did the keynote for this year’s Silicon Summit. This is one of the premier events for the C level executives in Silicon Valley, absolutely. Naveed is one of the top visionaries for the semiconductor industry and he certainly did not disappoint this time or any other time in my experience.… Read More

June 18, 2019June 17, 2019

Meet the Experts @ ES Design West!

Meet the Experts @ ES Design West!
by Daniel Nenni on 06-18-2019 at 10:00 am
Categories: ESD Alliance, Events, Semiconductor Services

SEMICON West and ES Design West are right around the corner here in San Francisco and I wanted to point out the Meet the Experts segment in the appropriately named Meet the Experts Theater. Great idea really and a super great line-up. The best part of course is actually meeting the experts. Over my 35 year semiconductor career I have… Read More

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