Senior Staff ASIC Design Engineer
Responsibilities
Define, architect, and write ASIC design specifications, micro-architecture, Partition designs, integration details;
RTL design to implement various data path control logic, custom state machines,
communication protocols like USB, I2C, UART, SPI using verilog, SVerilog, VHDL;
Integration and debug of embedded CPUs like ARM, RISC-V integration and peripherals in various ASIC designs;
Develop block/system level RTL to meet physical, DFT, and power goals;
Collaborate with internal and external design teams to complete the SoC developments at different stages;
Collaborate with the verification team to develop block level verification test benches & tests;
Work with the systems and software teams on emulation platforms and lead the bring-up of your designed blocks;
Play a key role in the bring-up of your design elements in the device prototype;
Low power digital design techniques to achieve overall PPA;
Scripting using Perl, Python, Tcl to support various activities in the ASIC development;
Writing timing constraints for the designs, Synthesis and Timing closure.
Requirements
10+ years in digital IC design;
Bachelor’s degree or higher in Electrical Engineering or equivalent degree;
Proven track record of successful tapeouts of multiple chips in submicron technologies;
Outstanding teamwork skills as a standout colleague;
Willingness to go the extra mile to achieve organization goals;
Fluency in Verilog and System Verilog languages, VHDL;
Proficiency in RTL coding, clock domain definitions, simulation, debugging, defining constraints for synthesis and static timing analysis (STA), and back annotated timing closure;
Proficiency in synthesis tool use (Design Compiler or Genus);
Analyze dynamic power consumption and insert clock gating or alternate logic design techniques as needed to achieve power consumption targets;
Experience with embedded CPU IP and peripheral component designs;
Experience with DDR4/ LPDDR Controller design, integration;
Understanding of different Video and Audio Codecs;
Understanding of DFT, and Test interfaces for IC testability.
Real men have fabs!