Chip design verification has long been a key component of any design project developing silicon intended to go into manufacturing. As designs become more complex, so does the manufacturing risk, and the focus on thorough verification becomes ever more critical.
Another dimension of complexity coming into play and considered throughout the entire electronic system. The shift toward chiplet-based design, 3D-IC and other innovative packaging technologies are driving the need for verification beyond the individual chip. System design verification that spans multiple devices, subsystems and even software code is becoming the norm for ensuring that an electronic system can be manufactured and perform as intended.
And yet, not all markets have the same requirements. Consider the differences between a low-cost consumer electronic product and an electronic medical system or device implanted in a human body. For example, the consumer product may have an expected lifetime of flow years and, if it malfunctions, it is annoying, but not life-threatening. Conversely, a medical electronic system may require an operating lifetime of more than 10 years and malfunctions are not tolerable as they may lead to serious health consequences, including death. In the case of both examples, rigorous verification is required. In the case of the medical electronic system, requirements for full system verification are much more stringent.
Yes, system design verification is more important now because of more use cases, applications and extended lifecycles. The requirement for functional verification runs through the entire electronic product design manufacturing supply chain. Without thorough verification, the supply chain can be compromised.
Given these scenarios, the ESD Alliance, a SEMI Technology Community, is drawing attention to the challenges and opportunities available throughout the entire electronic product design and manufacturing supply chain. It is sponsoring a panel discussion at SEMICON West on how supply chain verification is becoming a critical need in medical technology applications. “Supply chain verification” implies that thorough verification is required across the entire system of chips, components, and packaging. Our panel brings together experts in chip design, system design and verification, and advanced packaging technologies who will discuss supply chain verification challenges that must be undertaken in developing electronic medical devices and products where safety and reliability are the most important factors.
We invite you to join us for “Supply Chain Verification –– Critical Enabler for Next-Generation MedTech Innovations” Tuesday, July 12, 2022, 11:35 a.m. – 12: 25 p.m. in the Meet the Experts Stage, Moscone South, Exhibition Level, Room 2.
Our session moderator is Lucio Lanza of Lanza techVentures and our panelists are:
Mike Chin –– Intel
Lu Dai –– Qualcomm
Dave Kelf –– Breker Verification Systems
Jan Vardaman –– TechSearch International
Conference passes to both SEMICON West and the co-located Design Automation Conference can be used to attend this panel discussion.
The ESD Alliance will host a reception Wednesday, July 13, from 6 p.m. until 7:30 p.m. at Moscone Center South, Level 2, North Terrace. SEMICON West or DAC badges are required for entry.
SEMICON West 2022 Hybrid will be held July 12-14 at the Moscone Center in San Francisco. Registration is open. The Design Automation Conference (DAC), the premier gathering focused on the design and design automation of electronic circuits and systems, will be co-located with SEMICON West 2022 Hybrid. Registration is open.
About the ESD Alliance
The ESD Alliance, a SEMI Technology Community, serves as the central voice to communicate and promote the value of the semiconductor design ecosystem as a vital component of the global electronics industry. We have an ongoing series of networking and educational events, programs and initiatives. Additionally, as a SEMI Technology Community, ESD Alliance member companies can join SEMI at no extra cost. To learn more about the ESD Alliance, visit the ESD Alliance website. Or contact me at bsmith@semi.org if you have questions or need more information.
Engage with the ESD Alliance at:
Website: www.esd-alliance.org
ESD Alliance Bridging the Frontier blog
Twitter: @ESDAlliance
Also read:
The Lines Are Blurring Between System and Silicon. You’re Not Ready.
Multiphysics, Multivariate Analysis: An Imperative for Today’s 3D-IC Designs
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