WP_Term Object
    [term_id] => 72
    [name] => STMicroelectronics
    [slug] => stmicroelectronics
    [term_group] => 0
    [term_taxonomy_id] => 72
    [taxonomy] => category
    [description] => 
    [parent] => 14433
    [count] => 77
    [filter] => raw
    [cat_ID] => 72
    [category_count] => 77
    [category_description] => 
    [cat_name] => STMicroelectronics
    [category_nicename] => stmicroelectronics
    [category_parent] => 14433

Is FD-SOI Really Faster, Cooler, Simpler?

Is FD-SOI Really Faster, Cooler, Simpler?
by Eric Esteve on 11-12-2013 at 5:17 am

I love the slogan associated with FD-SOI: the technology is supposed to be Faster, Cooler, Simpler. Does this slogan reflect the reality? Let’s start with Simpler. We (the semiconductor industry) have the perception that Silicon On Insulator (SOI) technology is something complex and exotic. Why? Because SOI has been used to design some expensive photonic or power devices, and also by AMD since 2003 to process the 64bit Processor, rather complex design. This is a perception, let’s see what is the reality.

In the real world, FDSOI technology requires using more expensive SOI wafers. Then, moving from 28nm bulk to 28nm FD-SOI, means that 90% of the process steps will be identical, and the same manufacturing tools can be reused. The story becomes to be interesting when you realize that several process steps and masking levels are removed from 28nm bulk… So, saying that 28nm FD-SOI is Simpler than 28nm bulk is true.

Is FD-SOI Cooler than bulk? Cooler meaning less leakage induced power consumption, and less operating power. In fact, FD-SOI enables very low voltage operation, but the device is extremely fast at low voltage, running with better energy efficiency. For example, the same design running at 0.82V on FD-SOI will reach the same performance than under 1.0V on bulk, exhibiting 35% less dynamic power and 35% less leakage power in stand-by.

Gate Leakage is lower for FD-SOI, and we can identify the rational if we look at the above picture:

  • Gate dielectric is thicker, with a direct impact on the gate leakage current
  • Leakage current is less temperature sensitive with FD-SOI

That’s why it’s possible to design ultra low power SRAM memories on FD-SOI technologies, for example.

Finally, FD-SOI has lower channel leakage current, once again the above picture help understanding that the carriers are efficiently confined from source to drain: the buried oxide prevent these carriers to spread into bulk.
It look like FD-SOI is really cooler than bulk. Let’s check now if FD-SOI technology is also Faster.

Semiwiki readers have already seen the above picture in a previous blog, this version is just more synthetic. ARM processor has seen a 35% performance increase at nominal and high voltage, the performance going up to 2X at low voltage.

Nothing magic to explain such a faster performance, only physics laws: the source to drain channel being shorter, electrons can go faster from source to drain!

Finally, FD-SOI enables usage of body bias techniques, as illustrated on the above picture. Thus, the transistor can be ideally controlled through two independent gates. These body bias techniques allow dynamically modulating the transistor threshold voltage.
Does FD-SOI technology allow designing faster devices? These examples show that the answer is clearly yes!

Faster, Simpler, Cooler, but what about the cost? I plan to shortly propose a step by step explanation explaining why such a faster, simpler and cooler FD-SOI technology is also more cost effective than bulk.

From Eric Esteve from IPNEST

More Articles by Eric Esteve …..

lang: en_US

Share this post via:


0 Replies to “Is FD-SOI Really Faster, Cooler, Simpler?”

You must register or log in to view/post comments.