When is "off" not really off?

With the old fashioned on-off power switch came certainty of power consumption levels. This was fine back in the days before processor controlled appliances and devices. On was on and off was off: full current or no current. With the first personal computers you always had to wait for the boot process to complete before you could use it. This frequently was not quick, but tolerable when you were sitting at your desk and using the computer for a long stretch. And, of course it was fine to have it running all day from a power consumption perspective because the computer was plugged into wall power.

Some PC’s and most laptops had a sleep mode that eliminated the need to wait for a lengthy boot process before you could resume work. However, these were often buggy and problematic – restoring RAM contents from a hard drive for instance was time consuming. It might have been with the Palm Pilot, or perhaps the Apple Newton, that I first realized these devices were designed to usually be in sleep mode, not powered down, and ready to wake up and use at the press of a button. The first commercially prevalent device that featured this was the iPod – just push the button and it’s awake. Today this behavior is expected in everything from iPad’s to e-book readers, cameras, laptops, etc.

The early sleep modes for phones and similar devices were pretty simple compared to today’s requirements. Their main goal was to save state to reduce power until an external interrupt, such as a button press. People had low expectations about how long the battery would last in sleep mode. PDA’s and iPods would lose all power in sleep mode after a few days.

Phones of course need to wake on incoming calls, so the RF stages need to stay awake in sleep mode. Computers and phones also need to monitor network connections such as Ethernet or WiFi. Sleep has become more sophisticated. Devices often have different levels of sleep, with each having additional circuitry always-on, depending on the needed service level. The latest addition to the panoply of sleep-wake modes is sound, or even more specifically voice, activation.

Nevertheless, adding more functionality to sleep modes, aka “battery drain”, has risked decreasing battery life. However, consumer demands create the need for longer standby battery life. Techniques used to reduce power during wake mode include clock gating, power gating, voltage domains, block level power management, multi-threshold libraries, etc. Sleep mode power reduction presents its own challenges. This is especially true when complex functions such as voice recognition are enabled. Google, Apple and Amazon all offer devices that sleep with voice activated wake ability.

At the TSMC Technology Symposium in mid-March I had a chance to talk to Frederic Renoux with Dolphin Integration about their comprehensive offerings in the area of low power IP for managing sophisticated sleep modes. One of the topics he emphasized was the importance of selecting the best standard cell library for the always on (AON) portion of the chip. Dolphin has studied this topic extensively. Because they have much of the IP that would be used and have built demo chips, they have good technical basis for their observations.

The best choice for AON standard cell libraries depends on how much functionality is kept on. For instance, is it just a RTC and simple control logic, or is it more complex logic, like that needed for voice recognition? For minimal logic, it makes sense to use a library based on thick gate transistors. This offers lower leakage and in some cases can avoid the need for an external voltage regulator. The Dolphin Integration SESAME BIV library can operate up to 3.6V and is ideal for minimal logic AON designs.

For more complex AON regimes, especially where SRAM needs to be retained, the best way to save power is to use the lowest possible voltage – near threshold. For this Dolphin Integration offers their SESAME-NVT library. They also offer a high density standard cell library that is optimized for performance that uses HVT cells running at nominal voltage.

Dolphin Integration has an excellent write up on their website that details their experience using each of these libraries in various AON configurations. In the paper they show the block diagrams for each scenario and cover the specifics referencing the IP blocks used. It is clear to see why they are part of the TSMC partner ecosystem. They are in line with TSMC’s concept that the way to make significant improvements in performance is to focus on more than just one element, i.e not just std cells. Instead a system level approach is needed, which in the case of Dolphin includes IP, std cells, implementation know-how, etc.