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October 11, 2018October 10, 2019

How to Increase Energy Efficiency for IoT SoC?

How to Increase Energy Efficiency for IoT SoC?
by Eric Esteve on 10-11-2018 at 12:00 pm
Categories: Dolphin Design, Events, FD-SOI, IP
1 Comment

If you have read the white paper recently launched by Dolphin, “New Power Management IP Solution from Dolphin Integration can dramatically increase SoC Energy Efficiency”, you should already know about the theory. This is a good basis to go further and discover some real-life examples, like Bluetooth Low Energy (BLE) chip in … Read More

September 19, 2018October 10, 2019

Integrated Power Management IP to Decrease Power and Cost

Integrated Power Management IP to Decrease Power and Cost
by Eric Esteve on 09-19-2018 at 7:00 am
Categories: Dolphin Design, IP

This blog is the synthesis of a white paper “New Power Management IP Solution from Dolphin Integration can dramatically increase SoC Energy Efficiency”, which can be found on Dolphin Integration web site.

The power consumption generated by complex chips was not a real issue when the system could be simply plugged in the wall to … Read More

September 10, 2018October 10, 2019

The Rebirth of Dolphin Integration!

The Rebirth of Dolphin Integration!
by Eric Esteve on 09-10-2018 at 7:00 am
Categories: Dolphin Design, IP
1 Comment

You may have seen this Press Release (see below) announcing that Dolphin Integration (Dolphin) has been acquired by Soitec (60%) and MBDA (40%) – you can see more information about these two companies at the bottom of this blog. Founded in 1985, Dolphin had some recurrent cash flow issues during the last couple of years, that they… Read More

March 29, 2017October 10, 2019

When is "off" not really off?

When is "off" not really off?
by Tom Simon on 03-29-2017 at 12:00 pm
Categories: Dolphin Design, Events, IP, Mobile

With the old fashioned on-off power switch came certainty of power consumption levels. This was fine back in the days before processor controlled appliances and devices. On was on and off was off: full current or no current. With the first personal computers you always had to wait for the boot process to complete before you could … Read More

December 9, 2016October 10, 2019

Designing for Ultra-Low Power? Easier with “CLICK” IP

Designing for Ultra-Low Power? Easier with “CLICK” IP
by Eric Esteve on 12-09-2016 at 10:00 am
Categories: Dolphin Design, IoT, IP

Designing for ultra-low power will become the mantra for many of the new SoC designs, but the related SoC architecture can be very complex to handle. Make or buy is the project manager choice, but if you decide to ask for an expert advice before jumping start an ULP SoC design, attending thiswebinar from Dolphin Integration “The Proven… Read More

November 11, 2016October 10, 2019

Dolphin Webinar “The proven recipe for uLP SoC”

Dolphin Webinar “The proven recipe for uLP SoC”
by Eric Esteve on 11-11-2016 at 12:00 pm
Categories: Dolphin Design, IoT, IP

Dolphin will hold a live webinar on November 15, 9:00 AM PST or November 22, 10:00 AM GMT. This webinar targets the SoC designers wanting to learn how to quickly implement ultra-low power (uLP) techniques, using proven recipes.… Read More

July 16, 2015October 10, 2019

Leveraging Power Reduction Techniques for MCU Based SoCs

Leveraging Power Reduction Techniques for MCU Based SoCs
by Daniel Nenni on 07-16-2015 at 12:00 pm
Categories: Dolphin Design, IP

Dolphin Integration launched a new 32-bit microcontroller, RISC-351 Zephyr, targeting low-power SoCs for IoT-like competitive markets taking into consideration three angles for optimization of power consumption: architectural, memory and software.

Architecture Angle
As a reminder, 8-bit versus 16-bit versus 32-bit… Read More

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Prototyping with Intel's New 80M Gate FPGA and S2C! Analyzing PowerMOS Devices to Reduce Power Loss and Improve Reliability REPLAY: GPU-Powered SPICE: The Way Forward for Analog Simulation REPLAY: Avoiding CDM (Charged Device Model) ESD Failures REPLAY: eFPGA – "What a great idea! But I have no idea how I’d use it!" REPLAY: Ensuring System-level Security Through Hardware/Software Security Verification REPLAY: Fabless: The Transformation of the Semiconductor Industry REPLAY: The Brave New World of Customized Memory REPLAY: Embedded FPGA: The Fabric for Optimized Machine Learning REPLAY: VLSI Design Methodology Development REPLAY: Lightspeed Data Sync - Design Workspace Problems Solved! REPLAY: Desinging Complex SoCs and Dealing with Multiple File Formats? REPLAY: How ASIC/SoC Prototyping Solutions Can Help You! REPLAY: Reusing Your IPs & PDKs Successfully With Cadence® Virtuoso® REPLAY: Taiwan ESD Workshop Recording REPLAY: Reduce Risk and Improve Quality of AMS IP’s using AI-Powered Automated Timing Arc Prediction REPLAY: Text: A Year of Breakfast Bytes by Paul McLellan (Free PDF Version) REPLAY: Finding Your Way Through Verification REPLAY: Concerned about IP security threats for your SoCs? REPLAY: Achronix: Accelerate Data Processing Algorithms using FPGAs with 2D Network-on-Chip REPLAY: PAVE360: Of SoCs, Digital Twins, and Validating Autonomous Vehicle Behavior REPLAY: Thermal-induced Reliability Challenges and Solutions for Advanced IC Design REPLAY: Choose the Right ASIC Manufacturing Model for Your Business [filter] => 1 [visual] => 1 [rw_opt] => Array ( [widget_select] => 1 [others_front_page] => 1 [cpt_page] => 1 [others_blog_page] => 1 ) [display_widget_mobile] => 1 )

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How to Increase Energy Efficiency for IoT SoC?

Integrated Power Management IP to Decrease Power and Cost

The Rebirth of Dolphin Integration!

When is "off" not really off?

Designing for Ultra-Low Power? Easier with “CLICK” IP

Dolphin Webinar “The proven recipe for uLP SoC”

Leveraging Power Reduction Techniques for MCU Based SoCs

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