I first met Jimmy Chen from Easy-Logic at #60DAC and wrote about their Engineering Change Order (ECO) tool in August 2023. Recently we had a Zoom call so that I could see a live demo of their EDA tool in action. Allen Guo, the AE Manager for Easy-Logic gave me an overview presentation of the company and some history to provide a bit of context.… Read More
The demand for high-bandwidth, low-latency networking solutions has never been greater. As artificial intelligence (AI) workloads continue to grow exponentially, and hyperscale data centers become the backbone of our digital infrastructure, the need for faster and more efficient communication technologies becomes imperative.… Read More
Designers face enormous challenges for low-power designs. Whether it is IoT at the edge, AI in the datacenter, robotics or ADAS, the demand for increased functionality in SoCs is rapidly outpacing the power budget. Power must be considered at every stage of chip design including performance, reliability and packaging. Waiting
Electrical copper interconnects, once the backbone of data center networks, are facing growing challenges. Rapid expansion of AI and ML applications is driving a significant increase in cluster sizes within data centers, resulting in substantial demands for faster I/O capabilities. While the surge in I/O requirements is … Read More
Date and time: Thursday, September 7, 13:00-14:15
Organizer:
Cadence Design Systems Japan
Innotech Co., Ltd. IC Solution Division
Cost: Free
Venue: Online (Zoom webinar)
*It is also possible to participate from a web browser.
We recommend using Google Chrome, Firefox, or Chromium Edge.
Registration deadline: Wednesday, … Read More
Synopsys Webinar | Tuesday, September 19, 2023| 10:00 – 11:00 a.m. Pacific
As the demand for higher data rates, reduced power consumption and minimized latency grows, electrical copper interconnects are becoming an ever-increasing arduous and impractical approach with significant insertion and power losses, and
CEA-Leti is driving deep, sustainable innovation for low-power devices and sensing technology that meet the needs of More than Moore applications. During this workshop, CEA-Leti will share its latest advances in these fields and highlight the major role played by semiconductors in terms of innovation for healthcare, computing… Read More
ACM/IEEE International Symposium on Low Power Electronics and Design
August 7 – 8, 2023, TU Wien, Vienna, Austria (In-person)
Symposium
The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of innovative research in all aspects of low power electronics and design,… Read More
Don’t let power-related issues that appear late in the verification cycle impact your project schedule. Register for a webinar that shows you how to catch low-power issues early on.
The Cadence low-power solution considers power at every step of the design flow, from architecture to functional verification, analysis, implementation,… Read More
In wearables and hearables, low power is king. Earbuds for example still only manage a half-day active use before we need to recharge. Half a day falls short of truly convenient for most of us – a full day would be much better, allowing for overnight recharge. Physics limits battery sizes so system designers must look to SoC architectures… Read More
