There is an important difference between low power and low energy in SOC design. Low power focuses on instantaneous power consumption. This is frequently done to deal with cooling and heat dissipation issues. Of course, it serves as a prerequisite for low energy design, which seeks to reduce overall power consumption over time. Low energy is desired when energy is limited, such as in a battery, photovoltaic or other energy harvester. Low energy systems either have to get a certain amount of processing done with the available energy supply or they may have to preserve system operating life.
One of the most obvious techniques for reducing energy consumption is to reduce the operating voltage of the system. This can reduce dynamic energy consumption proportionally to the square of the voltage. Operating at or near threshold voltages offers big savings in energy consumption. So why not deploy it widely?
In a video recording of a DAC presentation by Minima Processor’s CTO Lauri Koskinen titled “Near Threshold Voltage: A Much Needed Reality or Risky Dream?” the pros and cons of near threshold operation are discussed. Without giving too much away, it is clear that near threshold voltage operation is an important arrow in the quiver of things that can be done to reduce system energy consumption. However, several specialized techniques need to be employed to maintain system performance and yield in chips intending to take advantage of this approach.
Lauri points out in his presentation that there is a minimum energy point for devices that is very close to the threshold voltage. If you overlay the maximum operating frequency (Fmax) on this, it is evident that for many applications the work per unit of energy can be optimized. Yet, this can be at a point where variation causes extreme shifts in device performance. Lauri points to evidence showing that subthreshold operation can cause 20X greater performance deltas due to random variation than operation at higher voltages.
Lauri asserts that near threshold operation offers great benefits without the difficulties of subthreshold, but still needs specialized techniques to make it commercially effective. Lauri points out that with specialized libraries and the use of advanced voltage scaling (AVS) that good results have been achieved. He presents several near threshold chips that have been designed over the years using standard design flows. They range from 180nm down to 14nm, all having very impressive low energy consumption.
He wraps up by reviewing the key success factors that will provide a path forward to low energy SOCs that can be used in products that require long battery life or operating times with alternative power sources. AVS and dynamic voltage and frequency scaling (DVFS) are first on his list. The latest EDA tools have capabilities that will support this type of design. He points out that there will have to be additional types of test methodologies to handle these designs. Beyond the methods above, allowing higher levels of granularity and intelligence in creating voltage islands and power domains is a powerful technique to ensure overall system performance while being miserly with energy consumption.
It is becoming more common for wireless devices to offer 10 year battery life. For instance, we see this in household lighting applications for remote wireless switches. Industrial applications and other uses where battery replacement or provisioning will create extra costs will be candidates for the most aggressive possible energy savings. Also, applications like earbuds call for maximizing useful life. We can expect to see more advanced and intelligent approaches to solving these challenges. If you want to view the entire DAC presentation given by Minima’s Lauri Koskinen it can be viewed here on their website.Share this post via: