EDA CEO Outlook 2018 Partly Cloudy

EDA CEO Outlook 2018 Partly Cloudy
by Daniel Nenni on 04-16-2018 at 7:00 am

The funniest line of the EDA CEO Outlook event was that we should rename our Amazon Echos Wally. Yes Wally is that smart and he remembers pretty much everything. I wish I could rename my Echo Wally because my daughter in-law is named Alexa so we have to turn it off when she is over. The discussion took an interesting turn with EDA in the … Read More


Mentor FINALLY Acquires Solido Design

Mentor FINALLY Acquires Solido Design
by Daniel Nenni on 11-20-2017 at 5:00 pm

I say finally because it was a long time coming… almost ten years to be exact. I started doing business development work for both Solido and Berkeley Design Automation about ten years ago and have been trying to put them together ever since. The synergy was obvious, like peanut butter and jelly. In fact, this is my third time … Read More


Machine Learning and EDA!

Machine Learning and EDA!
by Daniel Nenni on 04-21-2017 at 7:00 am

Semiconductor design is littered with complex, data-driven challenges where the cost of error is high. Solido’s new ML (machine learning) Labs, based on Solido’s ML technologies developed over the last 12 years, allows semiconductor companies to collaboratively work with Solido in developing new ML-based EDA products.

Data… Read More


Solido DA is One of Deloitte’s Fastest 50!

Solido DA is One of Deloitte’s Fastest 50!
by Daniel Nenni on 11-20-2016 at 8:00 pm

As a longtime EDA professional this really made my day. At a time where emerging EDA companies struggle for public validation, it warms my heart to see some very public recognition for an EDA job well done.

Deloitte, a leading Canadian professional financial services firm, announced the winners of their Technology Fast 50 program… Read More


A Better Way for Analog Designers to Perform Variation Analysis

A Better Way for Analog Designers to Perform Variation Analysis
by Tom Dillinger on 04-18-2016 at 7:00 am

The impact of process variation at advanced nodes is increasing — no surprise there. In recent years, the principal design emphasis to better reflect this variation has been the adoption of two new methodologies: (1) advanced on-chip variation (AOCV, as well as POCV/LVF) for digital static timing analysis, and (2) advanced… Read More


Improvements in SRAM Yield Variation Analysis

Improvements in SRAM Yield Variation Analysis
by Tom Dillinger on 03-27-2016 at 12:00 pm

The design of an SRAM array requires focus on the key characteristics of readability, writeability, and read stability. As technology scaling has enabled the integration of large (cache) arrays on die, the sheer number of bitcells has necessitated a verification methodology that focuses on “statistical high-sigma” variation… Read More


Replacing the British Museum Algorithm

Replacing the British Museum Algorithm
by Paul McLellan on 09-14-2015 at 7:00 am

In principle, one way to address variation is to do simulations at lots of PVT corners. In practice, most of this simulation is wasted since it adds no new information, and even so, important corners will get missed. This is what Sifuei Ku of Microsemi calls the British Museum Algorithm. You walk everywhere. And if you don’t walk to… Read More