Samsung Foundry Forum & SAFE™ Forum 2024 Korea

Samsung Foundry Forum & SAFE™ Forum 2024 Korea
by Admin on 07-01-2024 at 2:44 pm

Join us at SFF & SAFE™ Forum 2024

We’re inviting global partners and customers to our upcoming Samsung Foundry Forum (SFF) and Samsung Advanced Foundry Ecosystem (SAFE™) Forum 2024. The events will provide opportunities to share insights and innovative technologies to build a strong foundry ecosystem and accelerate innovation… Read More


yieldHUB Improves Semiconductor Product Quality for All

yieldHUB Improves Semiconductor Product Quality for All
by Mike Gianfagna on 04-03-2024 at 6:00 am

yieldHUB Improves Semiconductor Product Quality for All

We all know that building advanced semiconductors is a team sport. Many design parameters and processes must come together in a predictable, accurate and well-orchestrated way to achieve success. The players are diverse and cover the globe. Assembling all the information required to optimize the project in one place, with the… Read More


Intel and TSMC IDM 2024 Discussions

Intel and TSMC IDM 2024 Discussions
by Mark Webb on 03-10-2024 at 8:00 am

TSMC Intel

In December 2023, we published the Intel Revenue forecast for external wafer sales, gave a breakdown on how customers plan to ramp the foundry. The forecast is still valid (it assumes Intel executes on all plans) but since then we have a better understanding of Intel’s strategy and scenarios that could unfold.

The scenarios… Read More


Synopsys Expands Synopsys.ai EDA Suite with Full-Stack Big Data Analytics Solution

Synopsys Expands Synopsys.ai EDA Suite with Full-Stack Big Data Analytics Solution
by Kalar Rajendiran on 09-11-2023 at 10:00 am

Wafer Circuit Detail

More than two years ago, Synopsys launched its AI-driven design space optimization (DSO.ai) capability. It is part of the company’s Synopsys.ai EDA suite, an outcome of its overarching AI initiative. Since then, DSO.ai has boosted designer productivity and has been leveraged for 270 production tape-outs. DSO.ai uses machine… Read More


Webinar – Fabless: The Transformation of the Semiconductor Industry 2019 Update!

Webinar – Fabless: The Transformation of the Semiconductor Industry 2019 Update!
by Daniel Nenni on 08-10-2019 at 6:00 am

As more than 343 people (and counting) know, we will be releasing the 2019 updated PDF version of our first book “Fabless: The Transformation of the Semiconductor Industry” via handout at a live webinar. The response has been overwhelming and I want to personally thank you. The webinar will be a brief overview of the book with a question… Read More


3 Small-Team Design Productivity Challenges Managed

3 Small-Team Design Productivity Challenges Managed
by Don Dingee on 09-21-2016 at 4:00 pm

“Data management tools? We use small teams doing small designs. Each project only has two or three designers. Everyone uses the same EDA tools. Why do we need another tool for collaboration?” Good question. If you enjoy frequent meetings and redoing work because someone didn’t understand the status of IP blocks, the answers may… Read More


If an Intel 10nm transistor fell in the ARM forest

If an Intel 10nm transistor fell in the ARM forest
by Don Dingee on 08-18-2016 at 4:00 pm

Intel’s news at IDF this week about partnering with ARM for foundry services on 10nm set off some wild speculation. It’s not a surprise that ARM would enable Intel – they’ve worked together before, ARM is an equal opportunity ecosystem partner, and ARM has publicly announced 10nm cores taped out at TSMC.… Read More


In the Valley & thinking about FD-SOI for your next chip design? Epic (and free) symposium 13 April

In the Valley & thinking about FD-SOI for your next chip design? Epic (and free) symposium 13 April
by Adele Hars on 04-02-2016 at 7:00 am

If you’re in the chip biz in Silicon Valley, check out the SOI Consortium FD-SOI Symposium on April 13th in San Jose. They’ve been running these things since 2009, and I have to say that this one is the most comprehensive to date. Headliners include Cisco, Sony, NXP, SigmaDesigns, ARM, Ciena plus the big FD-SOI foundries,… Read More


Webinar: A Tool for Process and Device Evaluation

Webinar: A Tool for Process and Device Evaluation
by Tom Simon on 03-24-2016 at 12:00 pm

Not only are foundries continuing to introduce processes at new advanced nodes, they are frequently updating or adding processes at existing nodes. There are many examples that illustrate this well. TSMC now has 16FF, 16FF+ and now 16FFC. They are also announcing 10nm and 7nm processes. In addition, they are going back to older… Read More


Pure-play Foundries to Prevail in Future

Pure-play Foundries to Prevail in Future
by Pawan Fangaria on 01-17-2016 at 7:00 am

In a consolidating semiconductor business environment and innovation in semiconductor fabrication already scaling new heights with existing strong players, where do you think the wafer capacity should concentrate? It’s pure-play foundries or pure-play-like foundries, and those who supply high-volume common components… Read More