This is to inform you that the next DVClub Europe meeting takes place on Tuesday 17th October with the theme of “AI/ML in Verification”.
This DVClub considers how we can save time and effort whilst improving time-to-market through the application of AI/ML to verification.
Join Kim Schjøtler Sørensen our Ethernet TSN IPs Product Manager for a webinar, where he will explain TSN’s core concepts and present its applications in aviation, aerospace and defence.
This engaging session will empower you to better understand TSN, a technology based on the IEEE 802.1 standard.
You will gain insights into… Read More
Join Kim Schjøtler Sørensen our Ethernet TSN IPs Product Manager for a webinar, where he will explain TSN’s core concepts and present its applications in aviation, aerospace and defence.
This engaging session will empower you to better understand TSN, a technology based on the IEEE 802.1 standard.
You will gain insights into… Read More
Tell Your Story
Are you driving design change or feel you’ve overcome challenges that could impact the electronic revolution? CadenceLIVE offers you an opportunity to tell your story. Showcase your expertise and offer tips to address complexities and challenges facing engineers today.
CadenceLIVE Europe 2023 will be held
We look forward to meeting you at the 2023 GSE UK Conference which will take place at the Whittlebury Hall Hotel from October 30th to November 2nd 2023.
On October 30th there will be 4 bonus sessions per track that will be free of charge. Not all tracks will be participating, so far we have Application Development,… Read More
SoC cache coherency verification is one of the most complex challenges faced by verification engineers. And the introduction of the embedded L3 cache
May 11, 2023
Hilton Airport
Munich, Germany
U2U is your opportunity to learn, grow and connect with fellow technical experts who design leading-edge products using Siemens EDA tools.
U2U is focused on these areas:
The Design and Verification Conference & Exhibition Europe (DVCon Europe) is the premier European technical conference on system, software, design, verification, validation and integration. It is a place where the latest methodologies and technologies of tools, languages, and standards for integrated and embedded
Discuss the performance verification challenges posed by complex SoC with distributed cache from cluster, to interconnect to die-to-die.
12:00 Welcome and Introduction – Mike Bartley, Tessolve
12:00 Nick Heaton, Cadence Design Systems – SoC Verification in a Multi-chip,… Read More
