The 2016 Leading Edge Semiconductor Landscape

The leading edge semiconductor logic landscape has in recent years collapsed to just four companies. The following is a summary of what is currently known about each company’s plans and how they compare. ASML has analyzed many logic nodes and developed a formula that normalizes processes to a “standard node”. The formula is:

Where CPHP is the contacted polysilicon half-pitch and MMHP is the minimum metal half pitch.

The size of a standard cell is some number of tracks in height where a track is the minimum metal pitch and the width is the poly half-pitch. This makes CPHP and MMHP key measures of logic density.

We will use the ASML formula with our data on pitches to compare the four leading edge producers. The pitch values used for this calculation are in some cases updated from our SEMICON presentation.

TSMC
TSMC is currently in production with a 16nm process that has a standard node value of 18.3nm. TSMC has further announced risk production of a 10nm process in late 2016 that will provide a 2.10x improvement in density, a 7nm process that will enter risk production in late 2017 and provide a 1.63x improvement in density and a 5nm process that will enter risk production in late 2019 and provides a 1.90x improvement in density. The 5nm process is TSMC’s target process for the introduction of EUV. We estimate the standard node values for these processes will be 11.0nm, 9.5nm and 5.4nm for the 10nm, 7nm and 5nm nodes respectively (Authors note, these values are updated as of April 9, 2017. Part of the TSMC density improvement at 7nm is a 6 track cell that these metrics do not take into account).

Samsung
Samsung is currently in production with a 14nm process that has a standard node value of 16.6nm. Samsung is currently ramping a 10nm node and they have disclosed the contacted poly and minimum metal pitches. The resulting standard node value is 12.0nm. For 7nm Samsung has also announced they are going to use EUV and that makes the 7nm introduction date likely late 2018 at the earliest. Samsung hasn’t provided guidance on density but we estimate the standard node value will be 7.7nm (Authors note, this value is updated as of April 9, 2017).

Intel
Intel is currently in production with a 14nm process that has a standard node value of 13.4nm. Intel is expected to introduce their 10nm process late next year and they have disclosed the contacted poly pitch and minimum metal pitch for the process. We estimate the standard node value will be 8.8nm (Authors note, this value is updated as of April 9, 2017). With Intel now running approximately 3 years between nodes we expect a 7nm node from them around 2020 with a standard node value of 6.7nm.

GlobalFoundries
GlobalFoundries is currently in production with a 14nm process that has a standard node value of 16.6nm. Global Foundries has decided not to introduce a 10nm process because they believe it will be a short lived node. Global Foundries is working on a 7nm process but they have not announced an introduction date other than to say it will have a “competitive” introduction date. We believe it will be available for risk production in late 2017 with a standard node value of 8.2nm. This will be an optical process with EUV as a possible option when it is available.

Comparisons
We can now compare the processes by node and year using standard node values (bold values are the densest values).