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Synopsys Users Group 2012 Keynote: Dr Chenming Hu and Transistors in the Third Dimension!

Synopsys Users Group 2012 Keynote: Dr Chenming Hu and Transistors in the Third Dimension!
by Daniel Nenni on 04-08-2012 at 7:00 pm

It was an honor to see DR. Chenming Huspeak and to learn more about FinFets, a technology he has championed since 1999. Chenming is considered an expert on the subject and is currently a TSMC Distinguished Professor of Microelectronics at University of California, Berkeley. Prior to that he was the Chief Technology Officer of TSMC.… Read More


IP-SoC day in Santa Clara: prepare the future, what’s coming next after IP based design?

IP-SoC day in Santa Clara: prepare the future, what’s coming next after IP based design?
by Eric Esteve on 04-05-2012 at 10:16 am

D&R IP-SoC Days Santa Clara will be held on April 10, 2012 in Santa Clara, CA and if you plan to attend, just register here. IP market is a small world, and EDA a small market if you look at the generated revenue… but both are essential building blocks for the semiconductor industry. It was not clear back in 1995 that IP will become … Read More


Does Subsystem IP will finally find a market? ARC based sound subsystem IP is on track…

Does Subsystem IP will finally find a market? ARC based sound subsystem IP is on track…
by Eric Esteve on 04-05-2012 at 4:03 am

Will the launch of ARC based complete sound system IP by Synopsys ring the bell for the opening of a new IP market segment, the “Subsystem IP”? If you look at the IP market evolution, starting from standard cell libraries and memory compiler offering in the 1990’s, moving to commodity functions like UART or I2C in the late 1990’s to … Read More


Intel’s Fait Accompli Foundry Strategy

Intel’s Fait Accompli Foundry Strategy
by Ed McKernan on 04-05-2012 at 1:09 am

As many analysts have noted, it is difficult to imagine what Intel’s foundry business will look like one, two or even three years down the road because this is all new and what leading fabless player would place their well being in the hands of one who is totally new at the game. I would like to suggest there is a strategy in place that will… Read More


DAC Pavilion Panels

DAC Pavilion Panels
by Paul McLellan on 04-05-2012 at 12:00 am

Once again DAC has a full program of panel sessions that take place on the exhibit floor at the DAC pavilion, aka booth 310.

Gary Smith kicks off the program with his annual “What’s Hot at DAC” presentation on Monday, June 4th, from 9:15-10:15am. The rest of Monday’s pavilion panels are:

  • “Low power to the people,” a panel discussing
Read More

GSA Silicon Summit at the Computer History Museum!

GSA Silicon Summit at the Computer History Museum!
by Daniel Nenni on 04-04-2012 at 9:52 pm

The first GSA Silicon Summit will address the complexity, availability and time-to-market challenges that the industry must overcome to enable low power, cost effective solutions to keep pace with Moore’s Law. With never ending customer demand of better, faster and cheaper, semiconductor manufacturers must continually… Read More


U2U Mentor Users’ Group

U2U Mentor Users’ Group
by Paul McLellan on 04-04-2012 at 10:58 am

Mentor’s U2U user group meeting in Santa Clara is next week on April 12th at the Santa Clara Marriott. For those of you on the east coast the Waltham U2U is on May 16th, and for Europeans the Munich U2U will be on October 25th. Registration is open for both Santa Clara and Waltham, and there is a call for papers for Munich.

The day … Read More


How Co-design of MEMS-IC Saves Time

How Co-design of MEMS-IC Saves Time
by Daniel Payne on 04-04-2012 at 10:18 am

I learned about MEMS layout automation at a webinar in December and plan to attend another webinar next week on April 10thwhere two companies have created a MEMS-IC co-design flow, Tanner EDA and SoftMEMS. The big challenge is to ensure that the MEMS and electronic parts of a new design will simulate correctly before committing … Read More


Jasper Asian Seminars

Jasper Asian Seminars
by Paul McLellan on 04-04-2012 at 1:38 am

Jasper has three seminars coming up in May in Hsinchu (Taiwan), Beijing and Shanghai. These are full-day seminars on how to solve critical verification challenges using state-of-the-art formal technology. Breakfast and lunch will be served.

This full-day tutorial will be given by technical experts for verification experts… Read More


ARM big.LITTLE Virtual Platforms

ARM big.LITTLE Virtual Platforms
by Paul McLellan on 04-03-2012 at 7:11 pm

You have probably heard something about ARM’s big.LITTLE architecture. This links a Cortex-A15 multi-core CPU with a Cortex-A7 CPU. The A15 is a high-performance processor and the A7 is a very low power processor. The basic idea is that when high-performance is required (playing a graphical video game on your smartphone,… Read More