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Talking about Design IP (I mean successful Design IP) lead you to quickly pronounce the two magic key words: Quality and Ecosystem. Those who remember the IP emergence in the mid 90’s know very well why Quality has to be a prerequisite when dealing with Design IP, as they probably have paid the price of mediocre IP quality at that time.… Read More
With nearly twenty five years in business, Tanner EDA Application Engineers have seen a wide range of support requests. One consistent topic area is around design data management and design reuse. In one recent instance, our customer, an IDM who produces imaging sensors for infrared vision systems, called on Tanners AE team for… Read More
Every process node these days has a new “gotcha” that designers need to be aware of. In some ways this has always been the case but the changes used to be gradual. But now each process node has something discontinuously different. At 20nm the big change is double patterning. At 14/16nm it is FinFET.
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OK, enough with all this semiconductor geeky stuff. The important thing about DAC is…where to go to eat to avoid standard issue convention center chicken Caesar salad.
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For a couple of years the GSA has had working group looking at funding of semiconductor investment. There is a general feeling, which I share, that it is hard to get a fabless semiconductor company off the ground (nobody would dream of trying to create one with a fab these days) due to the size of the investment and the relatively long… Read More
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Dassault Systèmes (DS) was created in 1981 when a small team of engineers were spun out of Dassault Aviation. They were developing software to design wind-tunnel models and so reduce the cycle time for wind-tunnel testing, using surface modeling in 3D instead. The company entered into a distribution agreement with IBM that same… Read More
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Huawei’s and SMIC’s Requirement for 5nm Production: Improving Multipatterning Productivity