Public-key crypto-systems rely these days on approaches founded in mathematical methods which are provably hard to crack. The easiest to understand requires factorization of a key based on the product of two large prime numbers. Much has been made recently of the ability of quantum computers to crack this style of encryption.… Read More
Materials Selection Methodology White PaperThe Granta EduPack White Paper on Materials Selection,…Read More
Formal Verification: Why It Matters for Post-Quantum CryptographyFormal verification is becoming essential in the design…Read More
Architecting Your Next SoC: Join the Live Discussion on Tradeoffs, IP, and Ecosystem RealitiesDesigning a system-on-chip (SoC) has never been more…Read More
CEO Interview with Andrew Skafel of Edgewater WirelessAs the demand for high-capacity, low-latency wireless networks…Read More
CAST Webinar About Supercharging Your Systems with Lossless Data Compression IPsMuch of advanced technology is data-driven. From the…Read More
10 Predictions for the Future of IoT
A Google search for “Internet of Things” term reveals over 280,000,000 results, thanks to the media making the connection between the smart home, wearable devices, and the connected automobile, IoT has begun to become part of the popular parlance. But that’s not the complete picture, according to Gartner’s… Read More
Samsung 10nm and 7nm Strategy Explained!
Samsung Foundry had an intimate gathering recently for 200 customers and partners that I missed, but I know several people who attended. This event was a precursor to #53DAC where Samsung has the largest foundry presence. I was able to clarify what I had heard via a phone call with Kelvin Low so here is my version of what is important:… Read More
Enterprise Design Management Engineered for SoCs
In my initial look at ClioSoft’s design management system created from the ground up for the semiconductor industry, I made the opening case for managing and reusing IP across an ASIC design organization. Let’s for a moment say we agree on the need for an enterprise software package to do design management… Read More
Static Timing Analysis Keeps Pace with FinFET
At SemiWiki we’ve been blogging for several years now on the semiconductor design challenges of FinFET technology and how it requires new software approaches to help chip designers answer fundamental questions about timing, power, area and design closure. When you mention the phrase Static Timing Analysis (STA) probably… Read More
Webinar: How to Implement an ARM Cortex-A17 Processor in 22FDX 22nm FD-SOI Technology
Who’s doesn’t like a good webinar? I certainly do as it is one of the most time efficient ways to interact with the fabless semiconductor ecosystem, absolutely. Especially when it addresses two of the top trending topics on SemiWiki and they are ARM and FD-SOI. Here is a quick summary of what you will learn:
GLOBALFOUNDRIES… Read More
On Driving as Surfing
Driving a car is increasingly like surfing the Web. The day will soon arrive when highway on-ramps are equipped with signs asking you to accept cookies. Those drivers refusing to accept cookies may be diverted. At the very least, they will have an inferior driving experience.… Read More
Feeding the Startup Cycle
I am a technologist, an entrepreneur and most recently an angel investor. As I have announced my investments in promising young companies over the last couple years, many people have asked me why. Isn’t the stock market easier (well…), isn’t that risky (yep), what does that mean for your role at ARM (business… Read More
Digital Design Trends – A Cadence Perspective
I talked with Paul Cunningham (VP front-end digital R&D) at CDNLive recently to get a Cadence perspective on digital design trends. He sees needs from traditional semiconductor companies evolving as usual, with disruption here and there from consolidation. But on the system side there is explosion in demand – for wearables,… Read More
Cross-viewing improves ASIC & FPGA debug efficiency
We introduced the philosophy behind the Blue Pearl Software suite of tools for front-end analysis of ASIC & FPGA designs in a recent post. As we said in that discussion, effective automation helps find and remedy issues as each re-synthesis potentially turns up new defects. Why do Blue Pearl users say their tool suite is easier… Read More
Why I Think Intel 3.0 Will Succeed