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Free Webinar: Designing Low-Power IoT Systems

Free Webinar: Designing Low-Power IoT Systems
by Daniel Nenni on 06-05-2016 at 7:00 am

As I have written before, IoT looks to be a key driver for design starts and future semiconductor revenue growth which is why we wrote “PROTOTYPICAL” and included a field guide to FPGA Prototyping. If you want to get funding for your new IoT chip project, having a working prototype is a good thing, absolutely. If you want to take a look… Read More


My #53DAC Must See List!

My #53DAC Must See List!
by Daniel Nenni on 06-04-2016 at 7:00 am

It may be hard to believe but this happens to be my thirty third Design Automation Conference. Where does the time go? Three of my kids are out of college and the last one is getting close. That is where my time has gone. The conference itself started in 1964 but my first one was in 1984 in Albuquerque, New Mexico. In fact, that was the year… Read More


Blue Pearl adds RTL project transparency at #53DAC

Blue Pearl adds RTL project transparency at #53DAC
by Don Dingee on 06-03-2016 at 4:00 pm

You’re an RTL pro. You know what’s inside your code, and how many bugs you’ve tracked down and exterminated along the development path, and how much work remains. So, why did the meeting notice that just popped up asking for a monthly management project review presentation ruin your day?… Read More


A Shot in the ARM for IoT

A Shot in the ARM for IoT
by Randy Smith on 06-03-2016 at 12:00 pm

I recently attended the IoT Developers Conference in Santa Clara, CA. There were clearly two major themes in the talks – security and low power. The volume market in IoT is in the edge node devices. These devices have two important characteristics. They acquire data which needs to be transmitted and they typically are battery-driven… Read More


Reusable HW/SW Interface for Portable Stimulus

Reusable HW/SW Interface for Portable Stimulus
by Pawan Fangaria on 06-03-2016 at 7:00 am

Although semiconductor community has ushered into the era of SoCs, the verification of SoCs is still broken. There is no single methodology or engine to verify a complete SoC; this results in duplication of efforts and resources for test creation and verification at multiple stages in the SoC development, albeit with different… Read More


IMEC Technology Forum (ITF) – Moving the Electronics Industry Forward

IMEC Technology Forum (ITF) – Moving the Electronics Industry Forward
by Scotten Jones on 06-02-2016 at 4:00 pm

IMEC is a technology research center located in Belgium that is one of the premier semiconductor research centers in the world today. The IMEC Technology Forum (ITF) is a two-day event attended by approximately 1,000 people to showcase the work done by IMEC and their partners.

Gary Patton is the Chief Technical Officer and Senior… Read More


iDRM – A Complete Design Rule Development System

iDRM – A Complete Design Rule Development System
by Daniel Nenni on 06-02-2016 at 12:00 pm

Design rules are at the heart of the interface between the foundry and semiconductor designers, which makes them so critical. Traditionally, design rules and DRC decks have been developed manually with no or little automation. Design rule definitions are written using WORD or other general purpose office tools, and DRC decks… Read More


Layout Pattern Matching for DRC, DFM, and Yield Improvement

Layout Pattern Matching for DRC, DFM, and Yield Improvement
by Tom Dillinger on 06-01-2016 at 12:00 pm

It is truly amazing to consider the advances in microelectronic process development, using 193i photolithography. The figure below is a stark reminder of the difference between the illuminating wavelength and the final imaged geometries. This technology evolution has been enabled by continued investment in mask data generation… Read More