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CTO Interview: Jeff Galloway of Silicon Creations

CTO Interview: Jeff Galloway of Silicon Creations
by Daniel Nenni on 02-27-2017 at 7:00 am

It is clear that IP companies play an important role in modern semiconductor design, in fact, I would say that they are imperative. Founded in 2006, Silicon Creations is one of those imperative IP companies that provide silicon proven IP to customers big and small around the world. To follow-up on our conversation with Silicon Creations… Read More


Webinar: FPGA Prototyping and ASIC Design

Webinar: FPGA Prototyping and ASIC Design
by Bernard Murphy on 02-26-2017 at 4:00 pm

When you think about working with an ASIC service provider like Open-Silicon, you probably think about handling all the architecture, design and verification/validation in your shop, handing over a netlist and some other collateral, then the ASIC services provider takes responsibility for implementation and manufacturing.… Read More


Strong pickup in semiconductors in 2017

Strong pickup in semiconductors in 2017
by Bill Jewell on 02-26-2017 at 12:00 pm

World Semiconductor Trade Statistics (WSTS) is an organization of semiconductor companies created to collect market data. The members of WSTS also meet twice per year to develop forecasts for the semiconductor market. The “forecast by committee” approach of WSTS usually results in conservative forecasts. However, WSTS called… Read More


OEMs Lead the Way on Self Driving Tech

OEMs Lead the Way on Self Driving Tech
by Roger C. Lanctot on 02-25-2017 at 7:00 am

It’s never a good sign when car makers are called before Congress. It’s almost as bad as being asked to visit the President. But last week the meeting didn’t involve allegations or investigations. It was just an occasion for a friendly chat regarding “Self-Driving Cars: Road to Deployment.”

IEEE
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Another Live Event at Samsung!

Another Live Event at Samsung!
by Daniel Nenni on 02-25-2017 at 7:00 am

Last week Samsung hosted the GSA Silicon Valley “State of the Industry” Meet-up which was well attended by the semiconductor elite, myself included. The agenda started with an update on the semiconductor industry outlook followed by deep dives into Automotive, IoT, Artificial Intelligence, and Cybersecurity all of which areRead More


PowerTree — a data repository and simulation platform for PCB power distribution networks

PowerTree — a data repository and simulation platform for PCB power distribution networks
by Tom Dillinger on 02-24-2017 at 12:00 pm

The difficulty of managing the power domains on a complex SoC led to the development of a power format file description, to serve as the repository for data needed for functional and electrical analysis (e.g., CPF, UPF). Yet, what about complex printed circuit boards? How can the power domain information be effectively represented… Read More


Searching for Extraterrestrials

Searching for Extraterrestrials
by NicolasWilliams on 02-24-2017 at 7:00 am

Since the beginning of time, people on Earth have peered into the night sky, pondering if they were alone in the universe. Today, we have a large group of scientists that are working to answer that question. The precision required for their search often depends on the performance of a key piece of technology – the analog-to-digital… Read More


New Protocol (NB- IoT) Requires New DSP IP and New Business Model

New Protocol (NB- IoT) Requires New DSP IP and New Business Model
by Eric Esteve on 02-23-2017 at 12:10 pm

If we agree on the definition of IoT as a distributed set of services based on sensing, sharing and controlling through new nodes, we realize that these nodes are a big hardware opportunity. The chip makers and IP vendors have to create innovative SoC, delivering high performance at low cost and low energy. Moreover, the new systems… Read More


What You Don’t Know about Parasitic Extraction for IC Design

What You Don’t Know about Parasitic Extraction for IC Design
by Daniel Payne on 02-23-2017 at 7:00 am

Out of college my first job was doing circuit design at the transistor-level with Intel, and to get accurate SPICE netlists for simulation we had to manually count the squares of parasitic interconnect for diffusion, poly-silicon and metal layers. Talk about a burden and chance for mistakes, I’m so thankful that EDA companies… Read More


Power and Performance Optimization for Embedded FPGA’s

Power and Performance Optimization for Embedded FPGA’s
by Tom Dillinger on 02-22-2017 at 12:00 pm

Last month, I made a “no-brainer” forecast that 2017 would be the year in which embedded FPGA (eFPGA) IP would emerge as a key differentiator for new SoC designs (link to the earlier article here).

The fusion of several technical and market factors are motivating design teams to incorporate programmable logic functionality… Read More