Many years ago, not long after we first launched SpyGlass, I was looking around for new areas where we could apply static verification methods and was fortunate to meet Ralph Marlett, a guy (now friend) with extensive experience in DFT. Ralph joined us and went on to build the very capable SpyGlass DFT app. So capable that SpyGlass… Read More
 Chiplets: Powering the Next Generation of AI SystemsAI’s rapid expansion is reshaping semiconductor design. The…Read More
Chiplets: Powering the Next Generation of AI SystemsAI’s rapid expansion is reshaping semiconductor design. The…Read More Better Automatic Generation of Documentation from RTL CodeOne technical topic I always find intriguing is…Read More
Better Automatic Generation of Documentation from RTL CodeOne technical topic I always find intriguing is…Read More FD-SOI: A Cyber-Resilient Substrate for Secure Automotive ElectronicsThe paper highlights how Fully Depleted Silicon-On-Insulator (FD-SOI)…Read More
FD-SOI: A Cyber-Resilient Substrate for Secure Automotive ElectronicsThe paper highlights how Fully Depleted Silicon-On-Insulator (FD-SOI)…Read More ASU Silvaco Device TCAD Workshop: From Fundamentals to ApplicationsThe ASU-Silvaco Device Technology Computer-Aided Design Workshop is…Read More
ASU Silvaco Device TCAD Workshop: From Fundamentals to ApplicationsThe ASU-Silvaco Device Technology Computer-Aided Design Workshop is…Read MoreAssertion IP (AIP) for Improved Design Verification
Over the years design reuse methodology created a market for Semiconductor IP (SIP), now with formal techniques there’s a need for Assertion IP (AIP). Where each AIP is a reusable and configurable verification component used in hardware design to detect protocol and functional violations in a Design Under Test (DUT). LUBIS … Read More
Secure-IC and Silicon Labs Raise the Bar for Hardware Security
Cybersecurity is getting more critical every day. Thanks to sophisticated AI attacks, the need for hardware chip-level security is greater than ever. To fortify hardware against these types of attacks is not easy. There are three key attributes of a successful strategy: a well-designed root-of-trust, collaboration to ensure… Read More
Why Choose PCIe 5.0 for Power, Performance and Bandwidth at the Edge?
Synopsys recently held a webinar session on this topic and Gustavo Pimentel, Principal Product Marketing Manager at the company led the webinar session. Going into the webinar session, I found myself wondering: why focus on PCIe 5.0, eight years after its release? With the industry buzzing about Edge AI, cloud computing, and … Read More
Protect against ESD by ensuring latch-up guard rings
By Mark Tawfik
Overview: Protecting ICs from costly ESD and latch-up failures
Electrostatic discharge (ESD) events cost the semiconductor industry an estimated $8 billion annually in lost productivity, warranty claims and product failures [1].
Ensuring the robust protection of integrated circuits (ICs) against various… Read More
The 2025 Semi Industry Forum: On the Road to a $1 Trillion Industry
The global semiconductor industry stands at a defining moment in its history. Having surpassed $600 billion in annual revenue, the path to a $1 trillion market is no longer a distant dream but an achievable milestone within the next decade. The annual 2025 Semi Industry Forum, organized by Silicon Catalyst, brings together the… Read More
Selling the Forges of the Future: U.S. Report Exposes China’s Reliance on Western Chip Tools
The U.S. House Select Committee on the Strategic Competition Between the United States and the Chinese Communist Party released a bombshell report titled “Selling the Forges of the Future” on October 7, 2025, detailing how the People’s Republic of China is stockpiling semiconductor manufacturing equipment… Read More
SEMICON West AZ- Congress & China- Memory Madness- AI Semiconductor Tsunami
– First SEMICON in Arizona was great- should make it permanent
– Congress finally wakes up to China issues long after cows are gone
– Memory cycle in support of AI could be huge but scary at same time
– AI demand seems bottomless- but may distort chip industry dynamics
Phoenix SEMICON was wonderful!
The crowds… Read More
Podcast EP310: On Overview of the Upcoming DVCon Europe Conference and Exhibition with Dr. Mark Burton
Daniel is joined by Dr. Mark Burton, the General Chair for this year’s DVCon Europe. DVCon is the premier conference on the application of languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits.
Mark shares his long history of involvement in DVCon with Dan. He … Read More
Exploring TSMC’s OIP Ecosystem Benefits
Now that the dust has settled let’s talk more about TSMC’s Open Innovation Platform. Launched in 2008, OIP represents a groundbreaking collaborative model in the semiconductor industry. Unlike IDMs that controlled the entire supply chain, OIP fosters an “open horizontal” ecosystem uniting TSMC… Read More



 
			 
			 
			 
			 
			 
			 
			 
			 
			
The AI PC: A New Category Poised to Reignite the PC Market