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Rise Design Automation Webinar: SystemVerilog at the Core: Scalable Verification and Debug in HLSKey Takeaways - High-Level Synthesis (HLS) delivers not…Read More
SiFive Launches Second-Generation Intelligence Family of RISC-V CoresSiFive, founded by the original creators of the…Read More
Simulating Gate-All-Around (GAA) Devices at the Atomic LevelTransistor fabrication has spanned the gamut from planar…Read More
When I think of verification IP (VIP), I think of something closely tied to a protocol standard – AMBA, MIPI or DDR for example. Something that will generate traffic and run protocol compliance checks, to verify correct operation of an IP or as a model to use in SoC verification. What would a VIP for systems be? Systems support multiple… Read More
Nvidia/ARM $40B. AMD/Xilinx $35B. Marvell/Inphi $10B. Despite the disruption of COVID, a wave of high value semiconductor acquisitions is sweeping the industry. Why? Did something happen that stimulated this consolidation? Until 2015, the industry was experiencing continuous “de-consolidation” that started in 1965. … Read More
Ansys HFSS has been the world’s trusted gold standard for electromagnetic analysis for many years. As chip designs get bigger and more complex many users report that they’re extremely happy with the gold standard accuracy of HFSS but wish it would run faster. Fortunately Ansys has introduced many capabilities to HFSS over the… Read More
Here is another installment regarding presentations at the Linley Fall Processor Conference. Every now and again, you see a presentation at an event like this that shakes you up. Sometimes in a good way, sometimes not so much. I attended the Cornami presentation on its new TruStream computational fabric and I was definitely shaken… Read More
Mike Gianfagna, a fellow SemiWiki blogger and a one-time colleague at Atrenta shared a useful piece of marketing advice. If your company is not the biggest fish in the pond and you want to appear more significant, team up with other companies to put on an event, say a webinar. Pick your partners so that you can jointly offer a larger,… Read More
Despite the large role of place and route in IC design, there will always be a need for custom layout design. This is particularly true in radio frequency (RF), power management (PM) and power amplifier (PA) circuits, among others. Cadence Virtuoso is by far the leading tool for creating these custom designs. Virtuoso has a sophisticated… Read More
On October 20 at the Linley Fall Processor Conference, GLOBALFOUNDRIES made a compelling case for designing smarter, not smaller AI chips. The virtual conference was filled with presentations on the latest architectures and chips for all types of AI/ML applications. It was therefore a refreshing change of pace to hear the fab… Read More
After months of back and forth TSMC finally announced plans to build a fab in Arizona. The announcement was not made in the press or on the most recent investor call but on LinkedIn. A sign of the times I guess but since they need to hire a bunch of semiconductor people it was more than appropriate.
“We’re delighted to catch up with you … Read More
Tesla Motors kicked off the release of its latest earnings with news of record results and the release of the company’s Full Self Driving beta. Leading up to the earnings, most attention was focused on whether Tesla will meet its original target of 500,000 vehicle shipments this year in spite of the negative impact of the pandemic.
KLA reported revenue of $1.54B and Non GAAP EPS of $3.03 versus street expectations of $1.49B and EPS of $2.77. Guidance is for revenues… Read More
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