Cadence calls their hardware acceleration platforms, Palladium Z2 for fast pre-silicon hardware debug and Protium X2 for fast pre-silicon software validation, their Dynamic Duo. With good reason. Hardware acceleration is now fundamental to managing the complexity of verification and validation for large systems, hardware… Read More
Siemens EDA Illuminates the Complexity of PCB DesignAs heterogeneous multi-die design becomes more prevalent, the…Read More
Accelerating Advanced FPGA-Based SoC Prototyping With S2CHaving spent a significant amount of my career…Read More
Verification Futures with Bronco AI Agents for DV DebugVerification has become the dominant bottleneck in modern…Read More
There is more to prototyping than just FPGA: See how S2C accelerates SoC Bring-Up with high productivity toolchain?System-on-Chip designs continue to grow in scale and…Read MoreIs E-Waste Declining ? The rest of the story
Recently, there have been a number of articles with titles such as “Study shows residential electronic scrap generation is declining” or “E-scrap generation on the decline, study finds.” or “E-Waste Is Declining, Government Needs To Change Laws To Keep Up – And Get Out Of The Recycling Business.”
As a veteran of … Read More
Webinar: Annapurna Labs and Altair Team up for Rapid Chip Design in the Cloud
This is a story of strategic recursion. Yes, a fancy term. I just made up. If you’re not into algorithm development you can Google recursion, but the simple explanation is we’re talking about using the cloud to design the cloud. The story begins with Annapurna Labs, a fabless chip company focused on bringing innovation to cloud infrastructure,… Read More
Kioxia and Western Digital and the current Kioxia IPO/Sale rumors
There are a lot of articles out right now discussing a possible IPO for Kioxia or sale of the company with Western Digital (WD) and Micron Technology (MT) mentioned as possible acquirers. Kioxia and WD have a partnership for Flash Memory and on March 18th WD gave a presentation on the state of their partnership and what they see as their… Read More
VC Formal SIG Virtually Conferences in Europe
Pratik Mahajan, Synopsys VC Formal R&D Group Director, kicked off an absorbing event featuring talks from multiple customers in Europe. He spent some time on formal signoff, an important topic that I’m still not sure is fully understood. Answering the questions “OK, we did a bunch of formal checking but how does that affect… Read More
RISC-V is Building Momentum
The semiconductor intellectual property (SIP) market is an integral part of the semiconductor industry. Third-party IP has propelled the industry, opening the door for many new products from start-ups to established IDMs. Enabling increasingly complex devices, reducing the cost of product development and reducing the time… Read More
How Mentor became Siemens EDA
When I started in EDA the big three were Daisy, Mentor and Valid (DMV as we called them). Then came Synopsys in 1986 followed by Cadence, which was a clever merger between ECAD (Dracula DRC) and Solomon Design. Daisy and Valid were pushed aside and then there were, “Three dogs hovering over one bowl of dog food, not a pretty site.”… Read More
Tesla’s License to Kill
Even as Honda Motors puts a so-called Level 3 semi-autonomous vehicle on the road in Japan – 100 of them to be exact – the outrage grows over semi-autonomous vehicle tech requiring driver vigilance. Tesla Motors and General Motors have taken this plunge, creating a driving scenario where drivers – under certain circumstances … Read More
The Quest for Bugs: “Deep Cycles”
Verification is a resource limited ‘quest’ to find as many bugs as possible before shipping. It’s a long, difficult, costly search, constrained by cost, time and quality. For a multi-billion gate ASIC,
The search space is akin to a space search; practically infinite
In this article we talk about the quest for bugs at the system-level,… Read More
Podcast EP14: AI at the Edge
Dan and Mike are joined by Semir Haddad, senior director of product marketing at Eta Compute and Vineet Ganju, vice president and general manager, low power edge AI business at Synaptics. Semir and Vineet discuss the collaboration between Eta Compute and Synaptics to develop new and innovative solutions for AI applications… Read More



AI Bubble?