Jerry Chen, CEO and Founder of Upbeat Technology, received his Master of Science in ECE from the University of Texas at Austin. Started working as an IC design engineer in Silicon Valley at Intel, Lucent, Apple, and Procket Network since 1995. Later transitioned into Technical Marketing roles, serving as Director of Marketing… Read More
Focusing on the AI Big Picture with Moores Lab AI at DAC 2026DAC 2026 proved that agentic AI design flows…Read MoreUsing Claude AI for Chip Design
After speaking with dozens of semiconductor professionals at the Design Automation Conference in Long Beach about AI in the chip-design workflow, Claude emerged as the common denominator in every conversation. We’re still at the tip of the iceberg when it comes to using AI in the design flow. If management is pushing your team … Read More
Micron Advanced Memory Portfolio Positioned for AI Infrastructure Expansion
Micron Technology has emerged as a critical supplier in the AI compute ecosystem, leveraging its leadership in advanced DRAM, High Bandwidth Memory (HBM), and NAND flash technologies to address rapidly growing demand from hyperscale data centers and AI accelerator platforms. The company’s strategic focus on leading-edge… Read More
CEO Interview with Leon Lauritsen of Aras
Leon Lauritsen is the CEO of Aras, a leading provider of digital thread solutions for product lifecycle management and engineering AI. He joined the company in 2022 through the acquisition of Minerva PLM, where he had been for over 20 years. While at Minerva, Leon led sales and marketing globally and expanded its geographic coverage… Read More
Comparing Intel EMIB and Intel Foveros
Intel EMIB and Intel Foveros are advanced semiconductor-packaging technologies designed to combine multiple silicon dies, or chiplets, within one processor package. Both support heterogeneous integration: manufacturers can build different functions using the process technology best suited to each one, then connect … Read More
Boost Front-End SoC Design With Defacto’s AI-Powered Tool
Front-end SoC design has always been a balancing act between speed, accuracy, and the large amount of manual work required to get RTL, IPs, and collaterals to be aligned. In a recent webinar, Defacto CEO and founder Chouki Aktouf joined by product manager Valentin Boyer, walked through how the company is bringing AI directly into… Read More
Temperature Does Not Only Age Hardware — It Moves the System
Temperature is often treated as a reliability clock.
Increase the temperature, accelerate the failure mechanism, and estimate the equivalent field life.
That approach can be useful—but only when the dominant failure mechanism is known, its thermal activation behavior is understood, and the same mechanism remains active … Read More
Siemens and NVIDIA tout Agentic AI
Siemens has EDA tools and flows, NVIDIA has AI infrastructure, so what happens when these two companies collaborate? I’m at DAC 2026 and all the buzz this year is Agentic AI, so an came out on Sunday evening about how semiconductor and PCB design flows are being improved by this teamwork. Amit Gupta from Siemens and Timothy Costa from… Read More
Agentrys Launches Agentic Design Automation at DAC 2026
There were many new agentic design flows introduced at DAC this year. Some from mainstream providers and others from new startups. The increased level of activity around this technology was good to see. Most of the approaches presented at the conference were targeting specific parts of the flow. Verification and debug were popular… Read More
NVIDIA Brings Agentic AI Toolkit to EDA
NVIDIA’s expansion of the NVIDIA Agent Toolkit with PhysicsNeMo and CUDA-X libraries marks a shift from general-purpose AI assistants toward autonomous engineering systems. Instead of limiting agents to document retrieval, code generation, or workflow automation, the expanded toolkit lets developers connect reasoning… Read More





Verification IP proves essential for PCIe GEN5