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WEBINAR: 5 Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC

WEBINAR: 5 Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC
by Mike Gianfagna on 06-10-2021 at 6:00 am

WEBINAR 5 Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC

If you are involved in designing systems that process data, you’re going to want to attend this webinar. Practically speaking, this should include a large percentage of the SemiWiki readership. Since data is the new oil there are a lot of applications drawn to data and information processing. Before we explore this webinar, let’s… Read More


TSMC and the FinFET Era!

TSMC and the FinFET Era!
by Daniel Nenni on 06-09-2021 at 6:00 am

Intel 22nm wafer

While there is a lot of excitement around the semiconductor shortage narrative and the fabs all being full, both 200mm and 300mm, there is one big plot hole and that is the FinFET era.

Intel ushered in the FinFET era only to lose FinFET dominance to the foundries shortly thereafter. In 2009 Intel brought out a 22nm FinFET wafer at the… Read More


Silicon Catalyst is Bringing Its Unique Startup Platform to the UK

Silicon Catalyst is Bringing Its Unique Startup Platform to the UK
by Mike Gianfagna on 06-08-2021 at 10:00 am

Silicon Catalyst is Bringing Its Unique Startup Platform to the UK

Silicon Catalyst is a unique startup incubator / accelerator that focuses exclusively on accelerating solutions in silicon (including chips, IP, MEMS & sensors). The organization has an extensive support infrastructure that includes preferred access to IP, design tools, business infrastructure and fab/assembly. … Read More


Software Developers Turn to CacheQ for Multi-Threading CPU Acceleration

Software Developers Turn to CacheQ for Multi-Threading CPU Acceleration
by Lauro Rizzatti on 06-07-2021 at 10:00 am

image001 6

Three-year old CacheQ, founded by two former Xilinx executives and a clever group of engineers, produces a distributed heterogenous compute development environment targeting software developers with limited knowledge of hardware architecture.

The promise of compiler tools for heterogeneous compute systems intrigued… Read More


RealTime Digital DRC Can Save Time Close to Tapeout

RealTime Digital DRC Can Save Time Close to Tapeout
by Tom Simon on 06-07-2021 at 6:00 am

RealTime DRC

Over the years DRC tools have done an admirable job of keeping pace with the huge growth of IC design size. Yet, DRC runs for sign off on the full design using foundry rule decks take many hours to complete. These long run times are acceptable for final sign off, but there are many situations where DRC results are needed quickly when small… Read More


Chips for America Act – Funding Failures & Foreigners or Saving Semiconductors?

Chips for America Act – Funding Failures & Foreigners or Saving Semiconductors?
by Robert Maire on 06-06-2021 at 6:00 am

Government Bailout

-A repeat of the auto industry bailout of self inflicted issues?
-Not just money but systemic change is needed
-Perhaps chips need an Elon led revolution like autos & space
-Govt $ need focus not thrown into existing spend avalanche.

 

Are chips a replay of the auto industry bailout a decade ago? Deja Vu all over again.

The… Read More


Podcast Episode 23: What are chiplets and why are they gaining popularity?

Podcast Episode 23: What are chiplets and why are they gaining popularity?
by Daniel Nenni on 06-04-2021 at 10:00 am

Dan is joined by Krishna Settaluri, Co founder and CEO of Blue Cheetah. Krishna received his Ph.D. in electrical engineering from UC Berkeley and masters and bachelors from MIT specializing in design automation of high-speed silicon photonic links using analog generator technology. Krishna has worked at Apple, Google, Caltech… Read More


CEO Interview: Prakash Murthy of Atonarp

CEO Interview: Prakash Murthy of Atonarp
by Daniel Nenni on 06-04-2021 at 6:00 am

Prakash Murthy of Atonarp

Prakash Murthy is the co-founder & CEO of Atonarp, a leading molecular diagnostics company HQ in Tokyo Japan. Murthy has two decades of experience in engineering management and entrepreneurial ventures. Murthy also co-founded Inspiration Technologies and C2Silicon Software and served as the CEO of Core Solutions Inc.… Read More


Speed Up LEF Generation Times on Huge IC Designs

Speed Up LEF Generation Times on Huge IC Designs
by Daniel Payne on 06-03-2021 at 10:00 am

GDSII and LEF min

For IC designs there are many data formats used throughout the logical and physical design process, and one of those file formats is called LEF, an acronym for Library Exchange Format, created by Tangent, an early EDA company with Place and Route tools that was acquired by Cadence way back in March 1989. LEF generation times can become… Read More


Analog Sensing Now Essential for Boosting SOC Performance

Analog Sensing Now Essential for Boosting SOC Performance
by Tom Simon on 06-03-2021 at 6:00 am

analog sensing

In today’s System-on-Chip (SOC), analog blocks are used in many places such as I/O cells for communication, PLLs for generating clocks, LDO’s for converting supply voltage to internal rail voltage, Sensors for qualifying external characteristics such as temperature, light, motion, etc. However new advanced designs now require… Read More