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IBM and HPE Keynotes at Synopsys Verification Day

IBM and HPE Keynotes at Synopsys Verification Day
by Bernard Murphy on 10-06-2021 at 6:00 am

Synopsys Verification Day 2021 View Ondemand min

I have attended several past Synopsys verification events which I remember as engineering conference room, all-engineer pitches and debates. Effective but aiming for content rather than polish. This year’s event was different. First it was virtual, like most events these days, which certainly made the whole event feel more… Read More


Blur, not Wavelength, Determines Resolution at Advanced Nodes

Blur, not Wavelength, Determines Resolution at Advanced Nodes
by Fred Chen on 10-05-2021 at 10:00 am

Blur not Wavelength Determines Resolution at Advanced Nodes

Lithography has been the driving force for shrinking feature sizes for decades, and the most easily identified factor behind this trend is the reduction of wavelength. G-line (436 nm wavelength) was used for 0.5 um in the late 1980s [1], and I-line (365 nm wavelength) was used down to 0.3 um in the 1990s [2]. Then began the era of deep-ultraviolet… Read More


On-Device Tensilica AI Platform For AI SoCs

On-Device Tensilica AI Platform For AI SoCs
by Kalar Rajendiran on 10-05-2021 at 6:00 am

Varying On Device AI Requirements 1

During his keynote address at the CadenceLIVE 2021 conference, CEO Lip-Bu Tan made some market trend comments. He observed that most of the data nowadays is generated at the edge but only 20% is processed there. He predicted that by 2030, 80% of data is expected to be processed at the edge. And most of this 80% will be processed on edge… Read More


Heterogeneous Package Design Challenges for ADAS

Heterogeneous Package Design Challenges for ADAS
by Tom Simon on 10-04-2021 at 10:00 am

Hetergeneous Package Design

Increasingly complex heterogeneous packaging solutions have proved essential to meeting the rapidly scaling requirements for automotive electronics. Perhaps there is no better example of this than advanced driver-assistance systems (ADAS) that are found in most new cars. In a recent paper published by Siemens EDA, they … Read More


What the Heck is Collaborative Specification?

What the Heck is Collaborative Specification?
by Daniel Nenni on 10-04-2021 at 6:00 am

Git Commit

It’s been quite a while since I talked with Agnisys CEO and founder Anupam Bakshi, when he described their successful first user group meeting. I reached out to him recently to ask what’s new at Agnisys, and his answer was “collaborative specification.” I told him that I wasn’t quite sure what that term meant, and he offered to spend… Read More


Autonomous Vehicle Rationale Breaks Down

Autonomous Vehicle Rationale Breaks Down
by Roger C. Lanctot on 10-03-2021 at 6:00 am

Autonomous Vehicle Rationale Breaks Down

The latest SmartDrivingCars podcast raised fundamental questions regarding the rationale for developing autonomous cars while debating the various paths to market adoption. The discussion took place between Alain Kornhauser – faculty chair of autonomous vehicle engineering at Princeton University and Adriano Alessandrini,

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Podcast EP40: The Semiconductor Supply Chain and the Real Cause of Semiconductor Shortages

Podcast EP40: The Semiconductor Supply Chain and the Real Cause of Semiconductor Shortages
by Daniel Nenni on 10-01-2021 at 10:00 am

Dan and Mike are joined by Malcolm Penn, 50-year semiconductor industry veteran and founder and CEO of Future Horizons. Dan and Mike explore the evolution of the semiconductor supply chain, how we got to the current state of shortages and what the future may hold. Drawing on his substantial knowledge of the industry, Malcolm makes… Read More


The Semiconductor Shortage False Narrative!

The Semiconductor Shortage False Narrative!
by Daniel Nenni on 10-01-2021 at 6:00 am

Port of Oakland

The semiconductor shortage has really caught the world’s attention. Friends and family who don’t really know what a semiconductor is now ask me to explain it. This is great news for the semiconductor industry for different reasons which I will discuss here. We can also discuss the downside risks.

First, let’s look at a bit of semiconductor… Read More


Synopsys’ ARC® DSP IP for Low-Power Embedded Applications

Synopsys’ ARC® DSP IP for Low-Power Embedded Applications
by Kalar Rajendiran on 09-30-2021 at 10:00 am

Key Applications Driving PPA Optimized Signal Processing

On Sep 20th, Synopsys announced an expansion of its DesignWare® ARC® Processor IP portfolio with new 128-bit ARC VPX2 and 256-bit ARC VPX3 DSP Processors targeting low-power embedded SoCs. In 2019, the company had launched a 512-bit ARC VPX5 DSP processor for high-performance signal processing SoCs. Due to the length, format… Read More


Verification Completion: When is enough enough?  Part I

Verification Completion: When is enough enough?  Part I
by Dusica Glisic on 09-30-2021 at 6:00 am

Tunnel min

Verification is a complex task that takes the majority of time and effort in chip design. Veriest shares customer views on what this means. We are an ASIC services company, and we have the opportunity to work on multiple projects and methodologies, interfacing with different experts.

In this “Verification Talks”… Read More