WP_Term Object
(
    [term_id] => 25005
    [name] => ChipAgents AI
    [slug] => chipagents-ai
    [term_group] => 0
    [term_taxonomy_id] => 25005
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 12
    [filter] => raw
    [cat_ID] => 25005
    [category_count] => 12
    [category_description] => 
    [cat_name] => ChipAgents AI
    [category_nicename] => chipagents-ai
    [category_parent] => 157
)
            
ChipAgents AI Banner
WP_Term Object
(
    [term_id] => 25005
    [name] => ChipAgents AI
    [slug] => chipagents-ai
    [term_group] => 0
    [term_taxonomy_id] => 25005
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 12
    [filter] => raw
    [cat_ID] => 25005
    [category_count] => 12
    [category_description] => 
    [cat_name] => ChipAgents AI
    [category_nicename] => chipagents-ai
    [category_parent] => 157
)

See Autonomous Chip Design in Action with ChipAgents at DAC 2026

See Autonomous Chip Design in Action with ChipAgents at DAC 2026
by Daniel Nenni on 07-07-2026 at 2:00 pm

Key takeaways

 

Making the AI wave at DAC 2026 in Long Beach

DAC comes to Long Beach for the first time in 2026, with artificial intelligence expected to be one of the central topics across the conference program and exhibition floor.

For semiconductor design and verification teams, the discussion has moved beyond whether AI can assist engineers. The more urgent questions are where AI is delivering measurable value today, how it can be integrated into established EDA flows, and what level of trust is required before autonomous agents can be deployed in production design.

ChipAgents will address these questions at DAC 2026 through live demonstrations, technical sessions, customer presentations, and engineering results from real semiconductor development environments.

Below is a guide to where attendees can engage with ChipAgents at DAC.

Catch the TechTalk on Where Agentic AI Delivers Real Value

On July 29, ChipAgents Founder and CEO William Wang will join Analog Devices Senior Director Nimay Shah for a technical discussion on how agentic AI is being applied across real chip design workflows. The session will examine use cases including architectural exploration, RTL quality analysis, verification acceleration, physical design optimization, and design closure. The discussion is designed for design engineers, verification leaders, CAD managers, and technology executives evaluating where AI can produce measurable engineering impact today.

Experience the Future of Chip Design at ChipAgents Booth

From the largest booth on the DAC show floor, ChipAgents will showcase how agentic AI is moving from experimentation into production semiconductor workflows. Live demonstrations will highlight how its multi-agent platform automates design, verification, and debugging tasks while integrating with existing EDA tools and engineering environments.

The booth will also feature the Future of Chip Design Theatre, where customer and partner speakers from leading semiconductor and AI infrastructure companies will share field experience, deployment lessons, and technical perspectives on bringing agentic AI into chip development at scale.

More Technical Updates from ChipAgents

ChipAgents will be featured in multiple sessions and posters across DAC. Here are three technical sessions to add to your schedule.

#1 Autonomous Root Cause Analysis at Commercial Scale

Monday, July 27 | 1:45pm – 2:15pm PDT | Exhibitor Forum

Debugging remains one of the most time-consuming parts of frontend ASIC development, requiring engineers to navigate millions of lines of HDL, massive waveform data, and complex failure traces.

This session showcases how ChipAgents performs end-to-end root cause analysis using both code and waveform data at commercial scale. Evaluated across commercial-scale IPs including bus fabrics, RISC-V cores, PCIe, and DDR, ChipAgents achieved over 3× higher pass-at-one accuracy than state-of-the-art generic AI agents.

#2 AI-Driven Timing Closure

Tuesday, July 28 | 1:45pm – 2:15pm PDT | Exhibitor Forum

Timing closure is one of the most painful iteration loops in chip design. A single violation can send teams through hours or days of tool runs, report analysis, RTL investigation, and PPA tradeoff decisions before a fix can be validated.

From this session, you will learn the domain-specific capabilities required beyond general code generation, including timing report understanding, RTL mapping, design intent preservation, and PPA-aware decision-making.

#3 The New Era of Digital Verification

Engineering Poster Session One

Digital verification is under more pressure than ever. Teams are expected to reach high functional and code coverage, build reliable formal and UVM environments, accelerate debug, and still meet increasingly aggressive project schedules.

This joint paper with STMicroelectronics shows how agentic AI can automate the verification flow from end to end. Built around the ChipAgents platform, the methodology applies AI agents across the IC verification lifecycle from specification understanding and test planning to verification code generation, debugging, and results analysis.

Notably, specification reading time was reduced by 15×, formal assertion generation by 240×, and UVM environment creation by 400×. Most importantly, these gains are achieved under the full control of the verification engineer. Explore the poster to see how ChipAgents help your teams achieve similar results.

Book a Meeting with ChipAgents at DAC Today

If your team is evaluating how agentic AI can support design, verification, or debug, DAC is the right place to take a closer look.

Request a one-on-one meeting with ChipAgents’ AI experts to discuss your workflows, see relevant capabilities, and identify where autonomous agents can deliver practical engineering value.

Meeting slots are limited and available on a first-come, first-served basis. Submit the form today to reserve your spot.

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