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CMOS Forever?

CMOS Forever?
by Asen Asenov on 01-16-2022 at 6:00 am

CMOS Forever

Today, the CMOS chip manufacturing is the pinnacle of the human technology defining economy, society and perhaps us as modern humans. This was highlighted by the recent chip shortage, followed by the ‘shocking’ realization that more than 80% of all chips are manufactured in the Far East.

Important decisions need to be taken by … Read More


Podcast EP57: A Perspective of 2021 and 2022 with Malcolm Penn

Podcast EP57: A Perspective of 2021 and 2022 with Malcolm Penn
by Daniel Nenni on 01-14-2022 at 10:00 am

Dan is joined by Malcolm Penn, long-term semiconductor industry veteran and founder of Future Horizons, Dan and Malcolm review their last discussion on 2021 forecasts, which produced aggressive numbers many said were too optimistic. Their predictions turned out to be on the mark.

They also explore the topic of 2022 -what Read More


Webinar: Investing in Semiconductor Startups

Webinar: Investing in Semiconductor Startups
by Mike Gianfagna on 01-14-2022 at 6:00 am

Webinar Investing in Semiconductor Startups

Investing in semiconductor startups is something Silicon Catalyst knows a lot about. During a time when venture funding for chip companies all but disappeared, this remarkable organization built a robust incubator, ecosystem, support infrastructure and funding source. Silicon Catalyst has assembled a top-notch management… Read More


CES is Back – Partially

CES is Back – Partially
by Bill Jewell on 01-13-2022 at 2:00 pm

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CES (formerly the Consumer Electronics Show) returned to Las Vegas, Nevada last week. In 2021, CES was remote due to the COVID-19 pandemic. On April 28, 2021, the Consumer Technology Association (CTA), the sponsor of CES, announced CES 2022 would be held in Las Vegas. On the date of the announcement new COVID cases in the U.S. were… Read More


It’s Now Time for Smart Clock Networks

It’s Now Time for Smart Clock Networks
by Tom Simon on 01-13-2022 at 10:00 am

Movellus Maestro Clock Network

By now most SoC designers are pretty familiar and comfortable with the use of Network on Chip (NOC) IP for interconnecting functional blocks. Looking at the underlying change that NOCs represent, we see the use of IP to supplant the use of tools for implementing a critical part of the design. The idea that ‘smart’ things are better… Read More


AI at the Edge No Longer Means Dumbed-Down AI

AI at the Edge No Longer Means Dumbed-Down AI
by Bernard Murphy on 01-13-2022 at 6:00 am

face recognition

One aspect of received wisdom on AI has been that all the innovation starts in the big machine learning/training engines in the cloud. Some of that innovation might eventually migrate in a reduced/ limited form to the edge. In part this reflected the newness of the field. Perhaps also in part it reflected need for prepackaged one-size-fits-many… Read More


From Now to 2025 – Changes in Store for Hardware-Assisted Verification

From Now to 2025 – Changes in Store for Hardware-Assisted Verification
by Daniel Nenni on 01-12-2022 at 6:00 am

Jean Marie Brunet

Lauro Rizzatti recently interviewed Jean-Marie Brunet, vice president of product management and product engineering in the Scalable Verification Solution division at Siemens EDA, about why hardware-assisted verification is a must have for today’s semiconductor designs. A condensed version of their discussion is below.… Read More


DAC 2021 – What’s Up with Agnisys and Spec-driven IC Development

DAC 2021 – What’s Up with Agnisys and Spec-driven IC Development
by Daniel Payne on 01-11-2022 at 10:00 am

IDesignSpec min 1

Walking the exhibit floors at DAC in December I spotted the familiar face of Anupam  Bakshi, Founder and CEO of Agnisys, so I stopped by the booth to get an update on his EDA company. My first question for him was about the origin of the company name, Agnisys, and I found at that Agni means Fire in Sanskrit, one of the five elements.

The … Read More


Horizontal, Vertical, and Slanted Line Shadowing Across Slit in Low-NA and High-NA EUV Lithography Systems

Horizontal, Vertical, and Slanted Line Shadowing Across Slit in Low-NA and High-NA EUV Lithography Systems
by Fred Chen on 01-11-2022 at 6:00 am

EUV shadowing across slit

EUV lithography systems continue to be the source of much hope for continuing the pace of increasing device density on wafers per Moore’s Law. Recently, although EUV systems were originally supposed to help the industry avoid much multipatterning, it has not turned out to be the case [1,2]. The main surprise has been the

Read More

Can you Simulate me now? Ansys and Keysight Prototype in 5G

Can you Simulate me now? Ansys and Keysight Prototype in 5G
by Shawn Carpenter on 01-10-2022 at 10:00 am

5G Signal propagation

Ansys and Keysight wanted to see if they could answer the question, If we put virtual cellphones in different locations in a city, can we predict what kind of 5G signal we’re going to get in those locations? To find out, they created and tested a detailed virtual model of a city, including a variety of 5G antennae, receivers, and transmitters… Read More