Dr. Lesaicherre holds an MBA with a focus on International Business and Strategy from INSEAD, and has an MS degree and a PhD degree in Material Science from the Grenoble Institute of Technology (Grenoble INP). He is a Board Leadership Fellow, Governance Fellow and Director Certified for NACD (National Association of Corporate… Read More
Samtec Simplifies Complex Interconnect Design with Solution Blocks
The development of cost effective, high-performance silicon to silicon interconnect at the system level can be a vexing problem. So many choices, which one will work best? Ease of use and customer support are woven into the DNA of Samtec. Almost four years ago I explored the company’s focus on putting the customer first here. Fast-forward… Read More
Perforce IP and Design Data Management #61DAC
I recall first blogging about Helix IPLM (formerly Methodics IPLM) at DAC in 2012, then Perforce acquired the company in July 2020, so I stopped by the Perforce booth this year at DAC to get an update from Martin Hall, Principal Solutions Engineer at Perforce. Martin’s background includes working at Dassault Systemes, Synchronicity,… Read More
IROC Introduces an Upgraded Solution for Soft Error Analysis and Mitigation #61DAC
#61DAC Is the place to go for the latest ideas, technology and products for semiconductor design and manufacturing. Between the exhibit floor and the technical program, you can get a vast education on almost any topic. In this post, I will focus on a unique company and a new version of a unique solution. IROC Technologies specializes… Read More
Cadence® Janus™ Network-on-Chip (NoC)
A Network-on-Chip (NoC) IP addresses the challenges of interconnect complexity in SoCs by significantly reducing wiring congestion and providing a scalable architecture. It allows for efficient communication among numerous initiators and targets with minimal latency and high speed. A NoC facilitates design changes, enabling… Read More
A Joint Solution Toward SoC Design “Exploration and Integration” released by Defacto #61DAC
When I was at DAC last month, I had the chance to talk with Chouki Aktouf and Bastien Gratréaux from Defacto and they told me about a new innovative solution to generate Arm-based System-on-Chips. I heard that this solution has now been released.
Defacto and Arm developed a joint SoC design flow to help Arm users cover all needed automation—from… Read More
TSMC Foundry 2.0 and Intel IDM 2.0
When Intel entered the foundry business with IDM 2.0 I was impressed. Yes, Intel had tried the foundry business before but this time they changed the face of the company with IDM 2.0 and went “all-in” so to speak. The progress has been impressive and today I think Intel is well positioned to capture the NOT TSMC business by providing… Read More
A New Class of Accelerator Debuts
I generally like to start my blogs with an application-centric viewpoint; what end-application is going to become faster, lower power or whatever because of this innovation? But sometimes an announcement defies such an easy classification because it is broadly useful. That’s the case for a recent release from Quadric, based… Read More
Podcast EP236: Why Comprehensive Development Support for AI/ML is Important with Clay Johnson
Dan is joined by Clay Johnson, CEO of CacheQ. Clay has decades of executive experience in computing, FPGAs and development flows, including serving as Vice President of the Xilinx Spartan Business Unit which was acquired by AMD.
Clay discusses the changes occurring in system design to leverage AI/ML and technologies such as large… Read More
CEO Interview: Orr Danon of Hailo
Orr Danon is the CEO and Co-Founder of Hailo. Prior to founding Hailo, Orr spent over a decade working at a leading IDF Technological Unit. During this time he led some of the largest and most complex interdisciplinary projects in the Israeli intelligence community. For the projects he developed and managed, Danon received the … Read More
More Headwinds – CHIPS Act Chop? – Chip Equip Re-Shore? Orders Canceled & Fab Delay