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TSMC Technology Symposium 2026 Overview

TSMC Technology Symposium 2026 Overview
by Daniel Nenni on 04-22-2026 at 12:00 pm

Semiconductor Revenue $1T Accelleration

Yes, it is that time of year again, the 2026 TSMC Technology Symposium kick-off event in Silicon Valley. TSMC has never been in a better position to forecast the future of semiconductor technology and the industry itself. TSMC closely collaborates with the top semiconductor companies around the world and the top players in the … Read More


Could Neutral Atoms Take the Lead in Quantum Computing?

Could Neutral Atoms Take the Lead in Quantum Computing?
by Bernard Murphy on 04-22-2026 at 10:00 am

Neutral atom QC architecture

As of my recent posts on quantum computing (QC), superconducting QC is the leading technology contender, exemplified in systems from IBM, Google, and Fujitsu. Other technologies such as ion trap, neutral atom, photonic and quantum dot have generally been viewed as intriguing but second tier. I just read a very recent paper suggesting… Read More


Transitioning Voltage Regulator Design From Unidirectional To Bidirectional

Transitioning Voltage Regulator Design From Unidirectional To Bidirectional
by Daniel Nenni on 04-22-2026 at 8:00 am

Alphacore IP

An interesting article by Nazzareno Rossetti, published in How2Power Today, explores the transition from designing traditional unidirectional voltage regulators to bidirectional converters essential for modern energy management systems (EMSs). These systems optimize energy flow and storage among electric vehicles,… Read More


How to Overcome the Advanced Node Physical Verification Bottleneck

How to Overcome the Advanced Node Physical Verification Bottleneck
by Mike Gianfagna on 04-22-2026 at 6:00 am

How to Overcome the Advanced Node Physical Verification Bottleneck

It is well-known that advanced semiconductor process technology presents substantial challenges across the full design flow and global supply chain. In this piece, we will focus on a particularly difficult problem – physical verification. This design step is the final gate to manufacturing. Producing a final tape‑out GDS … Read More


Is Intel About to Take Flight?

Is Intel About to Take Flight?
by Jonah McLeod on 04-21-2026 at 10:00 am

Chip to Austin

The Pan Am–Boeing playbook and what Musk’s Terafab order could mean for Intel Foundry

“We either build the Terafab or we don’t have the chips.” That’s Elon Musk, speaking to Reuters, stating a supply constraint as plainly as anyone has stated one. TSMC is sold out. Samsung is committed. The existing supply chain can’t expand fast… Read More


Live Event: Engineering the Future of AI Systems

Live Event: Engineering the Future of AI Systems
by Daniel Nenni on 04-21-2026 at 8:00 am

Engineering the Future of AI Systems Keysight

The rapid acceleration of artificial intelligence (AI) workloads is placing unprecedented demands on system design, validation, and performance optimization. To address these challenges, Keysight Technologies presents its forward-looking event, Engineering the Future of AI Systems—a technical deep dive into the tools,… Read More


proteanTecs at Chiplet Summit – Changing the Game for Health & Performance Monitoring of Chiplets

proteanTecs at Chiplet Summit – Changing the Game for Health & Performance Monitoring of Chiplets
by Mike Gianfagna on 04-21-2026 at 6:00 am

proteanTecs at Chiplet Summit – Changing the Game for Health & Performance Monitoring of Chiplets

The recent Chiplet Summit 2026 was a great place to learn about new chiplet designs, emerging standards, and a growing array of support technologies to help design and manufacture chiplet-based systems. In my travels at the show, I found a lot of technology that fit these descriptions. But there were also companies at the show that… Read More


WEBINAR: Intrinsic Techniques in RF Power Amplifier Design

WEBINAR: Intrinsic Techniques in RF Power Amplifier Design
by Don Dingee on 04-20-2026 at 10:00 am

Intrinsic node overview

Load-pull power amplifier (PA) design techniques determine the optimal impedances at the power transistor’s extrinsic reference plane, which is the physically accessible boundary for measurement or simulation. This reference plane can be the package transistor leads, die bond pads, or IC chip terminals. It includes… Read More


Analog Bits Demos Real-Time On-Chip Power Sensing and Delivery on N2P at the TSMC 2026 Technology Symposium

Analog Bits Demos Real-Time On-Chip Power Sensing and Delivery on N2P at the TSMC 2026 Technology Symposium
by Mike Gianfagna on 04-20-2026 at 6:00 am

Analog Bits Demos Real Time On Chip Power Sensing and Delivery on N2P at the TSMC 2026 Technology Symposium

Analog Bits has a way of stealing the show at every event they attend. The formula is actually quite straight-forward – come to the show with the most relevant, highest impact IP running on the most advanced process. The company will be applying this strategy again at the upcoming TSMC 2026 Technology Symposium with an array of real-time… Read More


Disaggregating LLM Inference: Inside the SambaNova Intel Heterogeneous Compute Blueprint

Disaggregating LLM Inference: Inside the SambaNova Intel Heterogeneous Compute Blueprint
by Daniel Nenni on 04-19-2026 at 2:00 pm

Intel Sambanova SemiWiki Graphic

SambaNova Systems and Intel have introduced a blueprint for heterogeneous inference that reflects a significant shift in how modern large language model (LLM) workloads are deployed. Instead of relying on a single accelerator type, the proposed architecture assigns different phases of inference to specialized hardware:… Read More