CAST Simplifies RISC-V Embedded Processor IP Adoption with New Catalyst ProgramIn a move poised to accelerate the integration…Read More
Chiplets: Powering the Next Generation of AI SystemsAI’s rapid expansion is reshaping semiconductor design. The…Read More
Better Automatic Generation of Documentation from RTL CodeOne technical topic I always find intriguing is…Read More
The semiconductor industry is undergoing a transformative shift with the integration of AI into DRC workflows, as showcased in the Siemens EDA presentation at the 2025 TSMC OIP. Titled “AI-Driven DRC Productivity Optimization,” this initiative, led by Siemens EDA’s David Abercrombie alongside AMD’s… Read More
GPUs have been proposed before to accelerate logic simulation but haven’t quite met the need yet. This is a new attempt based on emulating emulator flows. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series… Read More
One of the more in interesting companies I met at the AI Infra Summit was a company known to me for some time. The most interesting part was the chip they are in the process of taping out; It is a high-performance, ultra-low-power AI processor purpose-built for edge computing. It is claimed to deliver “the processing muscle … Read More
There is always a lot of buzz about advanced AI workloads at trade shows. How to train them and how to run them. Advanced chip and multi-die designs are how AI is brought to life, so it was a perfect fit for discussion at a show. But there is another side of this discussion. Much of the work going on in AI workloads has to do with processing… Read More
In a move poised to accelerate the integration of open-source processor architectures into resource-constrained devices, semiconductor IP provider CAST, Inc. unveiled its Catalyst™ Program at the RISC-V Summit in Santa Clara, California. This initiative addresses a persistent pain point for embedded system developers:… Read More
Daniel is joined by Alex Burlak is Vice President of Test & Analytics at proteanTecs. With combined expertise in production testing and data analytics of ICs and system products, Alex joined proteanTecs in October, 2018. Before joining the company, Alex held a Senior Director of Interconnect and Silicon Photonics Product… Read More
Alex Demkov is co-founder and CEO of La Luce Cristallina. He is a distinguished figure in the field of materials physics, serving as a Professor at the University of Texas at Austin. With a prolific career marked by notable achievements, Alex boasts an impressive portfolio of 10 U.S. patents and many patent applications, showcasing… Read More
Today, Perforce IPLM stands at the intersection of data management, automation, and collaboration, shaping the way companies design the next generation of chips and systems. Looking ahead, its evolution will reflect the growing convergence of hardware, software, and AI-driven engineering.
AI’s rapid expansion is reshaping semiconductor design. The compute and I/O needs of modern AI workloads have outgrown what traditional SoC scaling can deliver. As monolithic dies approach reticle limits, yields drop and costs rise, while analog and I/O circuits gain little from moving to advanced process nodes. To sustain … Read More
One technical topic I always find intriguing is the availability of links between documentation and chip design. It used to be simple: there weren’t any. Architects wrote a specification (spec) in text, in Word if they had PCs, or using “troff” or a similar format if they were limited to Unix platforms. Then the hardware designers… Read More
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Intel to Compete with Broadcom and Marvell in the Lucrative ASIC Business