Streamlining Functional Verification for Multi-Die and Chiplet DesignsAs multi-die and chiplet-based system designs become more…Read More
S2C Advances RISC-V Ecosystem, Accelerating Innovation at 2025 Summit ChinaShanghai, July 19, 2025 — S2C, a leader in functional…Read More
Samtec Practical Cable Management for High-Data-Rate SystemsAccording to a recent Samtec whitepaper, in high-data-rate…Read More
A Quick Tour Through Prompt Engineering as it Might Apply to DebugThe immediate appeal of large language models (LLMs)…Read More
While the ASIC market has always had its advantages over alternate solutions, it has faced boom and bust cycles typically driven by high NRE development costs and time to market lead times. During the same time, the FPGA market has been consistently bringing out more and more advanced products with each new generation. With very… Read More
Dan is joined by Srinath Anantharaman, who founded Cliosoft in 1997 and serves as the company’s CEO. He has over 40 years of software engineering and management experience in the EDA industry.
Dan and Srinath explore the original focus for Cliosoft and how that has expanded over the years. The future of Cliosoft, as well as its plans… Read More
Coverage analysis is how you answer the question “have I tested enough?” You need some way to quantify the completeness of our testing; coverage is how you do that. Right out of the gate this is a bit deceptive. To truly cover a design our tests would need to cover every accessible state and state transition. The complexity of that task… Read More
The media has gone wild over a false report that Intel and TSMC are slowing down 3nm. It is all about sensationalism and getting clicks no matter what damage is done to the hardworking semiconductor people, companies and industry as a whole. And like lemmings jumping off a cliff, other less reputable media outlets perpetuated this… Read More
I’ve watched the SPICE market segment into multiple approaches, like: Classic SPICE, Parallel SPICE, FastSPICE and Analog FastSPICE. In a similar fashion the same thing just happened to EM/IR analysis, because after years of waiting we finally have a different approach to EM/IR analysis that works at the top-level of … Read More
The 3nm node is projected to feature around a 22 nm metal pitch [1,2]. This poses some new challenges for the use of EUV lithography. Some challenges are different for the 0.33NA vs. 0.55NA systems.
For 0.33 NA systems, 22 nm pitch can only be supported by illumination filling 4% of the pupil, well below the 20% lower limit for
For some reason the obsession with robotaxis persists throughout the world and throughout the transportation industry. The collective conventional wisdom appears to be that getting rid of the human drivers of taxis and letting these vehicles freely operate presumably around the clock will save money and the environment.… Read More
-KLA sings same cautionary song as LRCX (with Intel Chorus)
-Sees similar softening of WFE & second half
-Same Government “notice” on China/14NM – Same supply ills
-We remain concerned about share loss in patterning
KLAC reported… Read More
What we alone said would surely happen, but what was widely denied by the industry, was confirmed with June’s WSTS Blue Book report. Right on cue with our December 2021 forecast, the current semiconductor Super Cycle is finally drawing to a close and the 17th market downturn has now well and truly started.
The Macro Evidence
At the… Read More
Dan is joined by Dr. Yoan Dupret, the Managing Director and CTO of Menta – a leader in embedded FPGA IP cores for chips and smart sensors. Yoan explores the impact Menta’s embedded FPGAs are having on current designs. The reasons for Menta’s success and where the impact will be in the future are both discussed as well.… Read More
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Should the US Government Invest in Intel?