Materials Selection Methodology White PaperThe Granta EduPack White Paper on Materials Selection,…Read More
Formal Verification: Why It Matters for Post-Quantum CryptographyFormal verification is becoming essential in the design…Read More
Architecting Your Next SoC: Join the Live Discussion on Tradeoffs, IP, and Ecosystem RealitiesDesigning a system-on-chip (SoC) has never been more…Read More
CEO Interview with Andrew Skafel of Edgewater WirelessAs the demand for high-capacity, low-latency wireless networks…Read More
CAST Webinar About Supercharging Your Systems with Lossless Data Compression IPsMuch of advanced technology is data-driven. From the…Read More
Having known many of the top EDA CEOs during my semiconductor tenure the common traits I have found are brilliance, humility, endurance, and a sharp sense of humor. EDA solves so many problems, complex problem after complex problem, that it takes teams of incredibly smart people to solve them. Even more difficult is leading these… Read More
Way back in 2002 there was a study from Collett International Research on functional verification, and since 2010 the Wilson Research Group has continued that same kind of study with a new report every two years. What attracts me to this report is that it doesn’t just look at the installed base of one EDA vendor, instead it looks… Read More
I talked recently with Stelios Diamantidis (Distinguished Architect, Head of Strategy, Autonomous Design Solutions) about Synopsys’ announcement on the 100th customer tapeout using their DSO.ai solution. My concern on AI-related articles is in avoiding the hype that surrounds AI in general, and conversely the skepticism… Read More
Over the years storage has gotten very cheap, or has it? As a typical consumer, we take data storage for granted because access to it has gotten very cheap. Long gone are the days of being limited to 1.44MB floppy disks to store data. The smart devices we carry around with us can store 100’s of GB of data. That is a lot of data. But what about… Read More
I have always been curious about how Austemper-based safety methodologies (from Siemens EDA) compares with conventional safety flows. Siemens EDA together with Rambus recently released a white paper on getting a root of trust IP to ASIL B certification. This provides a revealing insight beyond the basics of fault simulation… Read More
At SemiWiki we’ve written four times now about how TSMC is standardizing on a 3DIC physical flow with their approach called 3Dblox, so I watched a presentation from John Ferguson of Siemens EDA to see how their tool flow supports this with the Calibre tools. With a chiplet-based packaging flow there are new physical verification… Read More
If, like me, you’ve been paying too little attention to historically less glamorous areas of chip design like packaging, you’ll wake up one day and realize just how much things have changed and continue to advance and how interesting it’s become.
One of the main drivers here is the increasing use of chiplets to counter the decreasing… Read More
It seems as if every day brings news of yet another company that is using artificial intelligence to leverage smartphone data for “non-invasive” analytics of human movement. Our smartphones and smartwatches and fitbits can detect whatever activity we are doing, how well or poorly we are doing it, how it is affecting our mood, … Read More
-Business will “drift down” over the course of 2023
-Not just memory is weak- China issue, foundry/logic slowing
-March guide worse than expected (Like Lam)
-Backlog likely saw push outs & cancelations but still long
Much as we saw with Lam, KLA reported a beat on the December quarter… Read More
Dan is joined by Anand Nambiar, Executive Vice President and Global Head of Semiconductor Materials at EMD Electronics, the North American Electronics business of Merck KGaA, Darmstadt, Germany. Anand has over 23 years’ experience in the semiconductor industry. His previous roles include Associate Director – Quality… Read More
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