CEO Interview with Nagesh Gupta of llmda.ai

Nagesh has built a career spanning multiple aspects of system design and development at companies including Hewlett-Packard, Cadence, Xilinx, and Lattice Semiconductor.

He is also a serial entrepreneur. Nagesh founded Taray, Inc., which developed memory interface generators for Xilinx designs and was later acquired by Cadence Design Systems. He also founded Auviz Systems, to accelerate Vision/ML algorithms for data center and embedded applications; Auviz was acquired by Xilinx.

About two years ago, Nagesh founded llmda.ai and became its CEO. His expertise spans startup development, product management, product development, and chip and hardware system design.

Tell us about your company

llmda is ushering in a new era for embedded systems development: chip dev, hardware/board dev and embedded software dev. Each of these domains is complex – and putting them all together is an order of magnitude higher in complexity. The gap between product requirements and product development artifacts has been a key reason for schedule slips. Data often turns out to be locally consistent but globally inconsistent. Schedule slips result in increasing the operating expenses and reducing the revenues generated. In fact, there’s a 33% revenue loss when a project is delayed by 6 months.

Why is this important to address? More than a third of Embedded Systems Designs is late to market by more than 50%. 75% of chip projects fall behind the original schedule. Only 14% of all chips in 2024 achieved first time success! The industry has tried to figure out the reason behind this. There have been several surveys conducted by research firms: Wilson Research/Siemens has consistently found that what is classified as “spec errors” due to the broken digital thread was a leading cause of logic and functional errors. 84% of ASIC projects now have an embedded processor and here Hardware/Software interface is a massive vector for failure. Changing specs and siloed teams are the leading cause.

Even with all the well-intended work by engineering teams, there’s a high percentage of data that drifts. The primary cause is the complexity involved. Just take chip design for example – even a simple digital chip has a team of at least 50 people distributed across geographies. And teams are generally separated into groups to address different domains – architecture, logic design, verification, physical design, and so on. Next, there’s the hardware (PCB) design teams and the embedded software teams.

Take a simple example of register space definition: a chip may contain tens of thousands of registers. Software is used to program these registers – you can see millions of possible combinations, hundreds to thousands of configuration spaces. A small difference in the definition is all it takes for the teams to drift apart. The amount of schedule slip depends on when the difference is found. With the current process, the question is not if there will ever be a drift. The question is when the drift will be detected.

Having worked in the industry for the past 30 years and seeing this firsthand, the advent of GenAI was a golden opportunity to solve this issue forever and eliminate this latent flaw. To me, the question was not only about building faster but building the right product faster.

llmda is backed by experts from EDA, Chip Design and GenAI and well-known valley investors: Emergent Ventures and Up Partners in the journey.

What problems are you solving?

Our goal is to eliminate schedule slips and thus reduce the operating expense and the time to market. Embedded systems development needs a highly specialized development requiring skilled engineers. The teams are often distributed among geographies and time zones. Even within a time zone, the teams are separated by several layers purely due to the size of the teams and the scope of problems teams are solving. The industry is expected to grow significantly. However, there’s also a significant shortage of talent to enable the industry to grow.

There is an industry, composed of incumbents as well as new startups that are innovating to shorten the chip design cycle through RTL generation, debug and verification help. To us the question is about “creating the product consistent with the intent”: not just about shortening the design cycle. Ensuring the product you are building is the right product is our goal.

What application areas are your strongest?

We focus on simple to complex semiconductor and embedded system development teams across all application domains – because the problem we are solving is universal. The question is only about the scale of the problem.

What keeps your customers up at night?

Three concerns dominate.

1. Design data to definition drift. In chip design/embedded system design, ensuring that the design is verified against the requirement before tape-out is critical. Fixing defects after tape-out can cost anywhere from several million dollars to more than $100 million.
2. Schedule slip. In silicon design and embedded system design, schedules generally don’t slip by weeks. Slips are measured in quarters and the visibility is generally poor. For example, everything continues as planned, but validation of the chip takes a very long time due to a simple issue like an incorrect register definition. Anyone who’s worked in this domain knows how hard it is to debug in real silicon!
3. Resource constraints – global design teams and a critical shortage of specialized resources.

What does the competitive landscape look like and how do you differentiate?

Many AI-assisted chip design efforts focus on generating RTL, verification code or providing co-pilot like features to debug faster. Several startups, along with all major EDA suppliers, are developing solutions in this area. These are all very useful and will impact the time taken to design and develop silicon.

llmda’s focus is to ensure what is designed is true to the intent. llmda is not only for teams that have adopted GenAI development tools, but also for teams that are still using the legacy toolset. llmda is about formally ensuring development data and artifact correctness and consistency.

What new features/technologies are you working on?

llmda will release a suite of products to address this space comprehensively. Immediately, llmda is addressing a very fundamental aspect with our llmda Spectra product: to automate generation of all technical documents consistent with design artifacts. This problem is universal and it touches every stage of development and product release. Lead engineers and architects spend up to 40% of time creating and maintaining documents & still teams get out of sync.

llmda has developed a documentation platform that is agentic, and with the user in the loop slashes document generation, maintenance and update times by up to 90%! llmda thus gives back time to the development team to do real Engineering and reduces time-to-market!

How do customers normally engage with your company?

llmda will be attending a growing number of industry events in the coming months. You can visit our website at https://www.llmda.ai to see where we will be exhibiting.

If you cannot attend one of these events, you can reach us directly at sales@llmda.ai to arrange a meeting where we can discuss our capabilities and explore how we can help address your system design challenges.

You can also follow our LinkedIn page to stay updated as we expand our product offerings.

Also Read:

llmda Emerges From Stealth with llmda Spectra™, bringing Agentic AI to Embedded Systems Development