CTO Interview with Taylor Barton of Certus SemiconductorTaylor Barton is a Lead Analog/Mixed-Signal and I/O…Read More
Generating Chip Subsystems Automatically: A New Answer to Manage Chip Design Complexity By Defacto Staff Today’s chips are no longer…Read More
Reimagining 3D IC Design: From Architecture to SignoffBy Keith Felton, Andras Vass-Varnai and Todd Burkholder,…Read More
GSA Honors Sanjay Mehrotra as Memory Takes Center Stage in ComputingThe Global Semiconductor Alliance will present Micron Technology…Read More
NIST Sets a Clearer Course for the Post-Quantum Security TransitionNIST’s report, Transition to Post-Quantum Cryptography Standards, gives…Read More
Secure-IC at DAC 2025: Building Trust into Tomorrow’s Chips and Systems
As semiconductor innovation accelerates, the chiplet-based design paradigm is redefining the landscape of advanced electronic systems. At DAC 2025, Secure-IC (booth #1208) will present a comprehensive suite of technologies engineered to address the… Read More
Dan is joined by Dr. John Ferguson, Director of Product Management for the Calibre nmDRC and 3DIC related products for Siemens EDA. John has worked extensively in the area of physical design verification. Holding several patents, he is also a frequent author in the physical design and verification domain. Current activities … Read More
Ollie is a commercially astute senior leader with over 20 years of experience in strategy, business development and sales across the technology and engineering sectors, with a strong track record in scaling businesses and driving growth. He has held commercial leadership roles in FTSE 100, private equity-backed, and startup… Read More
Dan is joined by Dr. Tania Roy, Associate Professor in Electrical and Computer Engineering at Duke University. She focuses on developing innovative hardware for artificial intelligence using advanced materials beyond silicon. Her research explores reliable gallium nitride (GaN) devices and new materials to move beyond … Read More
Keysight Showcases AI-Ready EDA and Multi-Physics Innovation at #62DAC
Design engineers attending #62DAC who focus on Design Data & IP Management, Analog, Mixed-Signal, RFIC, MMIC, or Multi-Physics should make booth #1408 a top destination. I had the opportunity to speak with Simon Rance, General Manager & Business… Read More
Clock Matters: What Infinisim Is Showcasing at DAC 2025
Optimize by Finding and Fixing Errors Across the Entire Clock Domain
The clock domain is the heartbeat of every high-performance SoC—and at DAC 2025, Infinisim is redefining how design teams approach clock optimization with speed, precision, and confidence.
If you’re… Read More
I wrote recently about a Siemens pre-announcement at DVCon on their directions in simulation+AI. On May 13th they officially announced a full spectrum of capabilities under the brand Questa One. Abhi Kolpekwar (VP/GM at Siemens EDA) more fully fleshed out the story for me. I asked why Siemens is late to this simulation+AI party.… Read More
Empyrean at DAC 2025: Full-Flow AMS/PMIC, SPICE Simulation, and AI-Accelerated Library Characterization
Empyrean returns to DAC 2025, showcasing our most advanced EDA solutions that power next-generation chip designs. This year, we spotlight three critical innovation areas:
Empyrean … Read More
For its 3rd DAC, Aniah comes to the show with a special treat for its customer : its new Analog Design Assistant, Amigo, makes analog and mixed-signal design engineers more productive every day. This product complements Aniah’s widely deployed, transistor-level verification solution, OneCheck.
Aniah is an EDA startup founded… Read More
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The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival