TSMC Formally Sues Ex-SVP Over Alleged Transfer of Trade Secrets to IntelThe big semiconductor news this week is the…Read More
WEBINAR: Revolutionizing Electrical Verification in IC DesignIn the complex world of IC design, electrical…Read More
Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion SiliconThe explosive growth of AI and accelerated computing…Read More
From Silos to Systems, From Data to Insight: Keysight's Upcoming Webinar on EDA Data TransformationIn the fast-evolving world of electronic design automation…Read More
Daniel,
On Jan 20th, you criticized that the EDA models are all broken and need to change. Ridiculing Synpsys, Cadence, Mentor and Magma for not agreeing to ‘pay for success’ type of model (some form of royalties).
On Feb 14th, you state thatIcahn doesn’t understand EDA and should stay out. Maybe he is seeing … Read More
San Jose, Calif., [DATE], 2011 – SemiWiki.com today announced that Mentor Graphics, a world leader in electronic hardware and software design solutions, will participate in the SemiWiki.com global social media platform aimed at facilitating mass communication for electronic design professionals through Web 2.0 technologies.… Read More
Thanks to the Semiconductor Ecosystem Survey from GSA-Wharton and the key indicators of semiconductor companies’ technology strategies related to IP:
The credit here goes to Atrenta for surveying their customer base in an effort to open up new communication channels for in-demand content using Web 2.0 technologies. The results are not surprising to me but they may be to other semiconductor ecosystem executives who do not get Social Media at all!
I have been using LinkedIn for five+… Read More
There has been a lot of talk about the fluid role of IP in semiconductor design. With the Synopsys acquisition of Virage Logic the playing field has tilted substantially in favor of Synopsys… or maybe not!
At first glance this acquisition appears to be a huge threat to EDA and IP companies allowing Synopsys to “throw in” IP as… Read More
The big EDA news last week of course was the CNBC interview (HERE) with infamous corporate raider Carl Icahn. Carl is not happy with Mentor Executives, nor is Mentor investor Donald Drapkin who said, and I quote, “It’s just a sleepy company run like a country club”. Carl and Donald’s combined MENT investment is 20%+ … Read More
A growing number of reports highlight a class of design errors that is difficult to check using more traditional methods, and can potentially affect a wide range of IC designs, especially where high reliability is a must.By Matthew Hogan
Today’s IC designs are complex. They contain vast arrays of features and functionality in … Read More
Good news in a way: Merrill Lynch (or Bank of America Merrill Lynch as I suppose we have to get used to calling them) have re-started coverage of EDA with a 20 page report on the industry, much of which is spent on explaining how the industry segments out and who is strong in which segments, stuff that most people reading this site already… Read More
When I worked at Intel as a circuit design engineer I could talk directly with the technology development engineers to understand how to really push my DRAM designs and get the smallest possible memory cell layout that would still yield well, provide fast access time, and long refresh cycles.
(United States Patent 6661699. Inventor:… Read More
"Managing increasing complexity through higher-level of abstraction: What the past has taught us about the future" Dr. Ajoy Bose, Atrenta CEO
Here is the abstract:
Time to market and design complexity challenges are well-known; we have all seen the statistics and predictions. A well-defined strategy to address … Read More
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