Principal Wafer Level Packaging Engineer
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Website Pragmatic
Overview
Pragmatic is seeking an experienced Packaging Development Engineer to join its expanding R&D team in Sedgefield. The Principal Wafer Level Packaging Engineer will be responsible for leading and coordinating wafer level packaging research and development activities for non-RFID applications, driving our internal roadmap and working closely with the Foundry, Operations and Process Engineering teams as well as external development partners.
Key tasks
- Lead FlexIC’s wafer level packaging development activities.
- Successfully develop and demonstrate FlexIC wafer packaging solutions
- Develop assembly technologies for Flexible Hybrid Electronics (FHE) applications.
- Day to day management, coordination and decision making related to packaging development activities
Qualifications and training
- Degree or post-graduate in electronics, mechanical engineering, electronics engineering, MEMS or another relevant discipline; or equivalent experience.
Skills and experience
- Experience with semiconductor packaging techniques including electroplating, redistribution layers, wafer bumping etc
- Experience with semiconductor, MEMs and flexible electronics assembly techniques including direct die attach, flip chip, thermo bonding, solder, wire bonding etc
- Experience with R2R and mechanical transfer processes (advantage)
- Experience in leading development projects interacting with internal and external stakeholders
- Knowledge and understanding of semiconductor fabrication techniques
- Ability to work to tight deadlines and progress multiple projects simultaneously
- Strong communication skills, interpersonal within the team and external facing
- Ability to work independently and part of a team.
- Project management experience
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