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Time is of the Essence for High-Frequency Traders

Time is of the Essence for High-Frequency Traders
by Dave Bursky on 06-27-2022 at 10:00 am

In the world of financial trading, nanoseconds count. The faster a trade can be accomplished, the more money a trader can make. Getting a trade in before a competitor also results in improved profits. What does this have to do with the partnership deal recently inked between Silicon Creations and Achronix? Plenty. The two companies are parleying their expertise in analog and mixed-signal technology (Silicon Creations) and high-speed programmable logic (Achronix Semiconductor) to deliver Silicon IP supporting higher performance ASIC solutions with more design flexibility by creating interfaces with lower delays. The joint efforts focus on optimizing the data path from the Silicon Creations SerDes interface to and from the Achronix embedded field-programmable gate arrays (eFPGAs), which are both part of a larger system-on-chip (SoC) solution.

The combined efforts by the two companies are filling a need by suppliers of high-frequency trading systems (HFTS). Such HFTS are typically proprietary designs that demand the highest-performance, lowest-latency ASIC solutions. To push more performance and design flexibility into the HFTS, Silicon Creations and Achronix provide silicon IPs that enable their customers to optimize the data path from the SerDes interface to and from the eFPGA IP. That will allow trading system designers to add flexibility and achieve topnotch performance in algorithmic trading applications.

 

LLPMA simple block

HFTS are typically proprietary designs that demand the highest-performing, lowest-latency silicon available. While ASICs are often a key component of such designs, eFPGA IP weaved into ASICs can deliver the performance and programmability that leading-edge systems require. Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), saw the synergy with programmable silicon, and that led to the partnership with Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP.

SerDes PMAs from Silicon Creations are optimized for ultra-low-latency optical connections, which are ideal for HFT Ethernet interfaces with in-PMA latency below 1.3 ns for 10G Ethernet. The SerDes PMAs also fit well in multiprotocol applications that support Ethernet 10G-KR, PCIe4, and many other protocols (see the figure). Multiprotocol SerDes PMA designs from Silicon Creations support over 30 protocols including CEI 6G & 11G SR, MR, LR, DisplayPort, Ethernet 10GBASE-X/S/K/R, PCIe Gen1/2/3/4, V-by-One HS/US, CPRI, PON, OTN/OTU, 3GSDI, JESD204A/B/C, SATA1-3, XAUI, SGMII. They have programmable (de)serialization widths of 8, 10, 16, 20, 32, or 40 bits. The transmit ring PLL includes fractional multiplication, spread spectrum and jitter cleaner function for Sync-E and OTU. Additionally, the PMAs offer out-of-band, electrical-idle signaling capability for SAS, SATA, and PCIe.

“We’re ready to provide tailored IP for HFT ASICs fabricated using 12/16 nm FinFET technology,” said Randy Caplan, co-founder and executive VP at Silicon Creations. “Engineers who need to stay at the front of today’s latency race must make a critical architectural decision: FPGA or ASIC? We think our partnership with Achronix to embed programmable logic in an ASIC offers the perfect blend of both technologies to drive improvements in programmable algorithmic trading.

Echoing a similar opinion, Steve Mensor, VP of Marketing and Strategic Planning at Achronix sees the partnership with Silicon Creations able to deliver a UDP-to-TCP loopback latency of under 10 ns, which is not possible with standalone FPGAs. “Together, we enable customers to create significant differentiation in their HFT systems by leveraging Achronix Speedcore eFPGA IP and Silicon Creations SerDes IP integrated into a customer’s ASIC.”

Read the full press release here: https://www.achronix.com/company/newsroom/news

For more information, visit www.siliconcr.com, and www.achronix.com

Also Read:

Creating Analog PLL IP for TSMC 5nm and 3nm

Essential Analog IP for 7nm and 5nm at TSMC OIP

Keeping Pace With 5nm Heartbeat

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