Generating AMI Models for SerDes Applications

Generating AMI Models for SerDes Applications
by Admin on 07-14-2022 at 10:00 am

Part of Keysight’s ‘Simulating for High-Speed Digital Insights’ webinar series

July 14, 2022 | 10:00 AM PT / 1:00 PM ET

AMI (Algorithmic Modeling Interface) has become the industry standard for modeling and simulating SerDes transmitter and receiver behaviors. It includes equalization, and CDR (Clock… Read More


Analog Bits and SEMIFIVE is a Really Big Deal

Analog Bits and SEMIFIVE is a Really Big Deal
by Daniel Nenni on 03-28-2022 at 6:00 am

SemiFive Analog Bits SemiWiki

Given the recent acquisitions the ASIC business is coming full circle as a critical part of the fabless semiconductor ecosystem. The most recent one being the SEMIFIVE acquisition of IP industry stalworth Analog Bits. These two companies came to the industry from opposite directions which make them a perfect match, absolutely.… Read More


Low Power High Performance PCIe SerDes IP for Samsung Silicon

Low Power High Performance PCIe SerDes IP for Samsung Silicon
by Tom Simon on 12-02-2021 at 10:00 am

SerDes IP for PCIe

No matter how impressive the specifications are for an SoC, the power performance and area of the finished design all depend on the IP selected for the IO blocks. In particular, most SOCs designed for consumer and enterprise applications rely heavily on PCI Express. Because PCIe analog IP is critical to design success, Samsung … Read More


The Path to 200 Gbps Serial Links

The Path to 200 Gbps Serial Links
by Kalar Rajendiran on 09-23-2021 at 10:00 am

Industry is Quickly Scaling

Ethernet speed evolution has kept a nice pace over the years even without any competing communications standard. And there are no signs of that slowing down, thanks to innovative companies deploying creative design techniques to keep delivering high-performance SerDes IP solutions. SerDes plays an integral role in implementing… Read More


How PCI Express 6.0 Can Enhance Bandwidth-Hungry High-Performance Computing SoCs

How PCI Express 6.0 Can Enhance Bandwidth-Hungry High-Performance Computing SoCs
by gruggles on 04-12-2021 at 2:00 pm

How PCI Express 6.0 Can Enhance Bandwidth Hungry High Performance Computing SoCs

What do genome sequencing, engineering modeling and simulation, and big data analytics have in common? They’re all bandwidth-hungry applications with complex data workloads. High-performance computing (HPC) systems deliver the parallel processing capabilities to generate detailed and valuable insights from these applications.

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How SerDes Became Key IP for Semiconductor Systems

How SerDes Became Key IP for Semiconductor Systems
by Eric Esteve on 02-14-2021 at 10:00 am

Ethernet bandwidth

We have seen that the interface IP category is seeing incredibly high growth rate over the last two decades and we expect this category to generate an ongoing high source of IP revenues for at least another decade. But if we dig into the various successful protocols like PCI Express, Ethernet or USB, we can detect a common function … Read More


Alphawave IP is Enabling 224Gbps Serial Links with DSP

Alphawave IP is Enabling 224Gbps Serial Links with DSP
by Mike Gianfagna on 12-14-2020 at 10:00 am

Alphawave IP is Enabling 224Gbps Serial Links with DSP

Alphawave IP is a new member of the SemiWiki community. You can learn about the company and their CEO, Tony Pialis in this interview by Dan Nenni. Design & Reuse did a virtual IP-SOC Conference recently and Tony presented. The D&R event had a very strong lineup of presenters. They supplemented the prepared video presentations… Read More


CEO Interview: Tony Pialis of Alphawave IP

CEO Interview: Tony Pialis of Alphawave IP
by Daniel Nenni on 12-04-2020 at 10:00 am

Tony Pialis Alphawave on SemiWiki

Tony Pialis is a visionary entrepreneur focused on developing
technologies for next generation connectivity. In the last twenty 20 years, he has co-founded three semiconductor IP companies, all exclusively targeting connectivity IP. Tony is currently the CEO of Alphawave IP Inc, a leader in delivering multi-standard wireline… Read More


Designing SerDes Channels for Protocol Compliance

Designing SerDes Channels for Protocol Compliance
by Admin on 08-18-2020 at 10:00 am

Register For This Web Seminar

Online – Aug 18, 2020
10:00 AM – 11:00 AM Asia/Singapore
Online – Aug 18, 2020
2:00 PM – 3:00 PM Europe/London
Online – Aug 18, 2020
2:00 PM – 3:00 PM US/Eastern

Overview

Multi-gigabit serial channels present some of the most stringent

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High-Speed SerDes PHY IP for Up to 800G Hyperscale Data Centers

High-Speed SerDes PHY IP for Up to 800G Hyperscale Data Centers
by admin on 08-04-2020 at 10:00 am

If you are designing high-performance computing and networking SoCs for hyperscale data centers, then you require IP that enables large amounts of data to travel at very fast rates. Whether the IP is for true long reach or very short-reach die-to-die connectivity in multi-chip modules (MCMs), you must consider several essential
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