Geoffrey Rodgers spent most of his career at the intersection of semiconductor technology and go-to-market execution, with a focus on scaling businesses and bringing complex solutions to market. He previously led the Analog Go-To-Market motion at Synopsys following the acquisition of Analog Design Automation and held leadership… Read More
As semiconductor technology advances into increasingly complex and expensive process nodes, the economic and technical risks associated with ASIC design have grown dramatically. At advanced nodes such as Intel 18A, the cost of a single design error can escalate into tens of millions of dollars, compounded by months of delay.… Read More
The semiconductor industry’s transition toward chiplet-based architectures is entering a decisive new phase. What began as a promising alternative to SoC design is now confronting real-world demands around system integration, validation, and long-term scalability. At Chiplet Summit 2026, taking place February 17–19 … Read More
When designing IP for system-on-chip (SoC) and application-specific integrated circuit (ASIC) implementations, IP designers strive for perfection. Optimal engineering often yields the smallest die area, thereby reducing both cost and power consumption while maximizing performance.
Similarly, when incorporating embedded… Read More
The rapid technological evolution and soaring mask set costs have created numerous challenges for designers today. Protocols, algorithms, and cryptography are all advancing at a blistering pace, leaving designers struggling to keep up. While fab suppliers are enhancing performance and reducing power consumption, this … Read More
Field-Programmable Gate Arrays (FPGAs) have long been celebrated for their unmatched flexibility and programmability compared to Application-Specific Integrated Circuits (ASICs). And the introduction of Embedded FPGAs (eFPGAs) took these advantages to new heights. eFPGAs offer on-the-fly reconfiguration capabilities,… Read More
In the dynamic landscape of chip design, two trends stand out as game-changers: the rise of the RISC-V instruction set architecture (ISA) and the advent of Software Defined products. Today, we delve into why these trends are not just shaping the industry but propelling companies like Andes and Menta to the forefront of innovation.… Read More
RISC-V have great adoption and momentum. One of the key benefits of RISC-V is the ability for SoC designers to extend its instruction sets to accelerate specific algorithms. Andes’ ACE (Andes Custom Extensions) allow customers to quickly create, prototype, validate and ultimately implement custom memories, dedicated ports… Read More
With our continuing chiplet coverage I found this of great interest. I have always felt that eFPGAs and chiplets are a natural fit for the next generation of chip design and this is an excellent example. As we design with chiplets one of the challenges is verification/validation in regards to performance and interoperability. … Read More
The emergence of chiplets as a technology is an inflection point in the semiconductor industry. The potential benefits of adopting a chiplets-based approach to implementing electronic systems are not a debate. Chiplets, which are smaller, pre-manufactured components can be combined to create larger systems, offering benefits… Read More
